Patents by Inventor Hao CAI
Hao CAI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11939630Abstract: Disclosed is a fluorescent PCR method for detecting HLA-B*15:02 allele and a specific primer probe combination. In the present disclosure, a set of primers and probes are designed based on an HLA-B*15:02 specific SNP gene locus by using TaqMan probe technology, combining another set of primers and probes corresponding to the internal reference gene ?-Actin, and a set of primer probe for non-HLA-B*15:02 genes are designed to detect whether a DNA sample contains an HLA-B*15:02 gene and whether a sample is homozygous or heterozygous. Compared with the similar detection methods in the past, the technical scheme in the present disclosure inherits the advantages of high specificity, high throughput, high resolution, low cost, simple and convenient operation, process controllability and the like of the fluorescent PCR, and may detect whether a sample is homozygous or heterozygous.Type: GrantFiled: August 19, 2021Date of Patent: March 26, 2024Assignee: Shaanxi Lifegen Co., Ltd.Inventors: Penggao Dai, Zihua Zhong, Hao Wang, Zhiye Cai, Lei Meng, Le Wang
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Publication number: 20240097433Abstract: A chip-level software and hardware cooperative relay protection device is provided. The device includes: a control chip, wherein a first control unit, a second control unit, and multiple logic circuits are integrated on the control chip; and the logic circuits perform microsecond-level rapid calculation on electrical signals of a protected electrical device, obtain fault feature parameters of the protected electrical device are and transmit same to the first control unit, then perform millisecond-level real-time protection logic determination according to the fault feature parameters of the protected electrical device to obtain relay protection results of the protected electrical device, and protect the protected electrical device by controlling an external relay according to the relay protection results.Type: ApplicationFiled: March 11, 2022Publication date: March 21, 2024Applicant: DIGITAL GRID RES. INST., CHINA SOUTHERN PWR. GRIDInventors: Peng LI, Wei XI, Xiaobo LI, Hao YAO, Yang YU, Tiantian CAI, Junjian CHEN
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Patent number: 11936958Abstract: A processor may automatically generate one or more transcripts based on a media context. The processor may append at least one of the one or more transcripts to the media. The processor may modify the at least one of the one or more transcripts based on an adjustment to a weight factor.Type: GrantFiled: July 28, 2021Date of Patent: March 19, 2024Assignee: International Business Machines CorporationInventors: Jian Dong Yin, Wen Wang, Zhuo Cai, Rong Fu, Hao Sheng, Kang Zhang
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Publication number: 20240075172Abstract: Disclosed are a gallium 68 labeled affibody protein PET imaging agent and a use thereof; the imaging agent comprises 68Ga-Z-tri; the 68Ga-Z-tri is obtained by labeling an affibody protein with gallium 68; the affibody protein comprises a PDGFR-? targeting trimer affibody protein Z-tri; and the amino acid sequence listing of the affibody protein Z-tri is as shown in SEQ ID NO. 1. According to the present invention, the utilized PDGFR-? targeting trimer affibody having a unique amino acid sequence has the characteristics of high affinity and high stability compared with a monomer affibody and a dimer affibody, can greatly increase a nuclide labeling rate, and achieves the effectiveness thereof as a PET imaging probe.Type: ApplicationFiled: December 7, 2021Publication date: March 7, 2024Inventors: Huawei CAI, Xiaofeng LU, Hao YANG, Lin LI, Rong TIAN, Jingqiu CHENG
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Publication number: 20240038593Abstract: A method includes forming first and second fins disposed on a substrate, forming a gate structure over the first and second fins, epitaxially growing a first source/drain (S/D) feature on the first fin and a second S/D feature on the second fin, depositing a dielectric layer covering the first and second S/D features, etching the dielectric layer to form a trench exposing the first and second S/D features, forming a metal structure in the trench and extending from the first S/D feature to the second S/D feature, performing a cut metal process to form an opening dividing the metal structure into a first segment over the first S/D feature and a second segment over the second S/D feature, and depositing an isolation feature in the opening. The isolation feature separates the first segment from the second segment.Type: ApplicationFiled: June 13, 2023Publication date: February 1, 2024Inventors: Chung-Hao Cai, Chia-Hsien Yao, Yen-Jun Huang, Fu-Kai Yang, Mei-Yun Wang
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Publication number: 20240038855Abstract: A method of forming a semiconductor structure includes providing a semiconductor substrate having a source/drain feature and a gate structure formed thereon; forming an interlayer dielectric layer on the semiconductor substrate; patterning the interlayer dielectric layer to form a trench to expose the source/drain feature within the trench; forming a dielectric liner on sidewalls of the trench; filling a metal layer in the trench; recessing a portion of the metal layer in the trench, thereby forming a recess in the metal layer; and refilling a dielectric material layer in the recess.Type: ApplicationFiled: April 11, 2023Publication date: February 1, 2024Inventors: Chung-Hao CAI, Chao-Hsun WANG, Chia-Hsien YAO, Wang-Jung HSUEH, Yen-Jun HUANG, Fu-Kai YANG, Mei-Yun WANG
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Publication number: 20240004123Abstract: An optical film comprises a light incident side and a light emitting side opposite to the light incident side. A plurality of light incident microstructures are formed on the light incident side, and the light incident microstructures are tapered structures. According to the structural design of the light incident microstructures of the optical film, the light field of a light source can be expanded to achieve the purpose of emitting light at a specific angle. The invention also provides a backlight module and a display device including the optical film.Type: ApplicationFiled: September 5, 2023Publication date: January 4, 2024Applicant: Radiant Opto-Electronics CorporationInventors: Wei-Hsuan CHEN, Chung-Yung TAI, Wen-Hao CAI, Chun-Yi WU
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Patent number: 11843331Abstract: A system for determining an initial angular position of a rotor of a synchronous machine includes a motor driver module configured to provide a motor driver voltage signal to the synchronous machine, the motor driver voltage signal being sufficient to induce an electrical current in the synchronous machine; and a rotor position determination module configured to receive an indication of the current generated in the machine and to determine the initial position of the rotor based on the indication of the current generated in the machine.Type: GrantFiled: August 15, 2022Date of Patent: December 12, 2023Assignee: Eaton Intelligent Power LimitedInventors: Yaojin Mo, Huaqiang Li, Jimmy Qi, Tony Zhao, Hao Cai
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Patent number: 11789192Abstract: A backlight module includes at least one optical film and a backlight unit. The optical film has a light incident side and a light emitting side opposite to the light incident side. A plurality of light incident microstructures are formed on the light incident side, and the light incident microstructures are tapered structures. The backlight unit is disposed on the light incident side of the optical film and includes a light source. According to the structural design of the light incident microstructures of the optical film, the light field of the light source can be expanded to achieve the purpose of emitting light at a specific angle. The invention also provides a display device including the backlight module.Type: GrantFiled: June 29, 2022Date of Patent: October 17, 2023Assignee: Radiant Opto-Electronics CorporationInventors: Wei-Hsuan Chen, Chung-Yung Tai, Wen-Hao Cai, Chun-Yi Wu
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Patent number: 11646346Abstract: A method of forming a semiconductor device structure is provided. The method includes forming an insulating layer over a semiconductor substrate including a conductive feature, forming an insulating layer with a trench over the semiconductor substrate to expose the conductive feature, and forming a sacrificial liner layer over two opposite sidewalls and a bottom of the trench. Ions are implanted into the conductive feature covered by the sacrificial liner layer, so that a doping region is formed in the conductive feature and has two opposite side edges respectively separated from the two opposite sidewalls of the trench. The sacrificial liner layer is removed after forming the doping region, and a conductive connecting structure is formed in the trench. The two opposite sidewalls of the conductive connecting structure are respectively separated from the two corresponding opposite sidewalls of the trench by an air spacer.Type: GrantFiled: April 8, 2021Date of Patent: May 9, 2023Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chung-Hao Cai, Chun-Po Chang, Chien-Yuan Chen, Yen-Jun Huang, Ting Fang, Chen-Ming Lee, Fu-Kai Yang, Mei-Yun Wang
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Patent number: 11611637Abstract: Technology related to scheduling services on a platform including configurable computing resources is disclosed. In one example, a method includes scheduling a service to execute on a first computing node based on an availability of general-purpose computing resources at the first computing node. The first computing node can be selected from a plurality of computing nodes. Network traffic transiting the first computing node can be analyzed during the execution of the service to determine a hardware accelerator of a second computing node is capable of assisting the execution of the service. The service can be scheduled to execute on the second computing node and the hardware accelerator of the second computing node can be used to assist with the execution of the service.Type: GrantFiled: September 30, 2021Date of Patent: March 21, 2023Assignee: F5, Inc.Inventors: Hao Cai, William Ross Baumann, Timothy S. Michels, Lars Pierson Friend
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Publication number: 20230049780Abstract: In one aspect, a system for determining an initial angular position of a rotor of a synchronous machine includes a motor driver module configured to provide a motor driver voltage signal to the synchronous machine, the motor driver voltage signal being sufficient to induce an electrical current in the synchronous machine; and a rotor position determination module configured to receive an indication of the current generated in the machine and to determine the initial position of the rotor based on the indication of the current generated in the machine.Type: ApplicationFiled: August 15, 2022Publication date: February 16, 2023Inventors: Yaojin Mo, Huaqiang Li, Jimmy Qi, Tony Zhao, Hao Cai
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Publication number: 20230013893Abstract: A backlight module includes at least one optical film and a backlight unit. The optical film has a light incident side and a light emitting side opposite to the light incident side. A plurality of light incident microstructures are formed on the light incident side, and the light incident microstructures are tapered structures. The backlight unit is disposed on the light incident side of the optical film and includes a light source. According to the structural design of the light incident microstructures of the optical film, the light field of the light source can be expanded to achieve the purpose of emitting light at a specific angle. The invention also provides a display device including the backlight module.Type: ApplicationFiled: June 29, 2022Publication date: January 19, 2023Applicant: Radiant Opto-Electronics CorporationInventors: Wei-Hsuan CHEN, Chung-Yung TAI, Wen-Hao CAI, Chun-Yi WU
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Publication number: 20220344214Abstract: Semiconductor structures and methods are provided. An exemplary method according to the present disclosure includes forming a first source/drain feature, a second source/drain feature and an interlayer dielectric (ILD) layer over the first and second source/drain features. The method also includes removing a portion of the ILD layer to form a cut feature opening and forming a hybrid cut feature therein to divide a to-be-formed metal layer into multiple pieces as source/drain contacts. The hybrid cut feature includes a conformal dielectric liner over the cut feature opening and a dielectric filler over the dielectric liner. During the formation of a source/drain contact opening, at least a portion of the dielectric liner extending along a sidewall of the dielectric filler is partially and selectively removed, leading to a dimension-reduced hybrid cut feature and thus a reduced spacing between two adjacent source/drain contacts.Type: ApplicationFiled: September 2, 2021Publication date: October 27, 2022Inventors: Chung-Hao Cai, Chia-Hsien Yao, Chen-Ming Lee, Fu-Kai Yang, Mei-Yun Wang
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Publication number: 20220336592Abstract: A method according to the present disclosure includes receiving a workpiece that includes a gate structure, a first gate spacer feature, a second gate spacer feature, a gate-top dielectric feature over the gate structure, the first gate spacer feature and the second gate spacer feature, a first source/drain feature over a first source/drain region, a second source/drain feature over a second source/drain region, a first dielectric layer over the first source/drain feature, and a second dielectric layer over the second source/drain feature. The method further includes replacing a top portion of the first dielectric layer with a first hard mask layer, forming a second hard mask layer over the first hard mask layer while the second dielectric layer is exposed, etching the second dielectric layer to form a source/drain contact opening and to expose the second source/drain feature, and forming a source/drain contact over the second source/drain feature.Type: ApplicationFiled: June 30, 2022Publication date: October 20, 2022Inventors: Ting Fang, Chung-Hao Cai, Jui-Ping Lin, Chia-Hsien Yao, Chen-Ming Lee, Fu-Kai Yang, Mei-Yun Wang
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Publication number: 20220328622Abstract: A method of forming a semiconductor device structure is provided. The method includes forming an insulating layer over a semiconductor substrate including a conductive feature, forming an insulating layer with a trench over the semiconductor substrate to expose the conductive feature, and forming a sacrificial liner layer over two opposite sidewalls and a bottom of the trench. Ions are implanted into the conductive feature covered by the sacrificial liner layer, so that a doping region is formed in the conductive feature and has two opposite side edges respectively separated from the two opposite sidewalls of the trench. The sacrificial liner layer is removed after forming the doping region, and a conductive connecting structure is formed in the trench. The two opposite sidewalls of the conductive connecting structure are respectively separated from the two corresponding opposite sidewalls of the trench by an air spacer.Type: ApplicationFiled: April 8, 2021Publication date: October 13, 2022Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chung-Hao CAI, Chun-Po CHANG, Chien-Yuan CHEN, Yen-Jun HUANG, Ting FANG, Chen-Ming LEE, Fu-Kai YANG, Mei-Yun WANG
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Patent number: 11441023Abstract: A film, preferably, a multi-layered film, including a polymer composition, wherein the polymer composition includes: within a range from 1 wt % to 25 wt % of a cyclic olefin copolymer based on the weight of the polymer composition, and within a range from 75 wt % to 99 wt % (the remainder of material) of a polyethylene based on the weight of the polymer composition, wherein the cyclic olefin copolymer has a glass transition temperature (T.sub.g) of at least 80.degree. C. The films may be used in shrink packaging application.Type: GrantFiled: April 27, 2018Date of Patent: September 13, 2022Assignee: ExxonMobil Chemical Patents Inc.Inventors: Keran Chen, Yong Yang, Ling Ge, Xiao-Chuan Wang, Zhen-Yu Zhu, LeiLei Ma, Xin Hao Cai, Gregory K. Hall, Caiguo Gong, Jean-Marc C. De Koninck, Robert J. Wittenbrink
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Patent number: 11444562Abstract: In one aspect, a system for determining an initial angular position of a rotor of a synchronous machine includes a motor driver module configured to provide a motor driver voltage signal to the synchronous machine, the motor driver voltage signal being sufficient to induce an electrical current in the synchronous machine; and a rotor position determination module configured to receive an indication of the current generated in the machine and to determine the initial position of the rotor based on the indication of the current generated in the machine.Type: GrantFiled: February 26, 2020Date of Patent: September 13, 2022Assignee: Eaton Intelligent Power LimitedInventors: Yaojin Mo, Huaqiang Li, Jimmy Qi, Tony Zhao, Hao Cai
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Publication number: 20220223743Abstract: Semiconductor structures and methods are provided. A semiconductor structure according to the present disclosure includes a first fin structure and a second fin structure over a substrate, a first source/drain feature disposed over the first fin structure and a second source/drain feature disposed over the second fin structure, a dielectric feature disposed over the first source/drain feature, and a contact structure formed over the first source/drain feature and the second source/drain feature. The contact structure is electrically coupled to the second source/drain feature and is separated from the first source/drain feature by the dielectric feature.Type: ApplicationFiled: October 15, 2021Publication date: July 14, 2022Inventors: Chung-Hao Cai, Yen-Jun Huang, Ting Fang, Chia-Hsien Yao, Cheng-Ming Lee, Fu-Kai Yang, Mei-Yun Wang
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Patent number: 11387331Abstract: A method according to the present disclosure includes receiving a workpiece that includes a gate structure, a first gate spacer feature, a second gate spacer feature, a gate-top dielectric feature over the gate structure, the first gate spacer feature and the second gate spacer feature, a first source/drain feature over a first source/drain region, a second source/drain feature over a second source/drain region, a first dielectric layer over the first source/drain feature, and a second dielectric layer over the second source/drain feature. The method further includes replacing a top portion of the first dielectric layer with a first hard mask layer, forming a second hard mask layer over the first hard mask layer while the second dielectric layer is exposed, etching the second dielectric layer to form a source/drain contact opening and to expose the second source/drain feature, and forming a source/drain contact over the second source/drain feature.Type: GrantFiled: July 22, 2020Date of Patent: July 12, 2022Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Ting Fang, Chung-Hao Cai, Jui-Ping Lin, Chia-Hsien Yao, Chen-Ming Lee, Fu-Kai Yang, Mei-Yun Wang