Abstract: The present disclosure provides a method for topography simulation of a physical structure under a topography-changing process. The method includes initializing a voxel mesh as a three-dimensional (3D) representation of a physical structure by a general-purpose processor, generating a plurality of particles, simulating a flight path of at least one of the particles by a hardware-accelerated processor different from the general-purpose processor, identifying a voxel unit in the voxel mesh that intersects the flight path by the hardware-accelerated processor, passing information describing a collision between the one of the particles and the voxel unit from the hardware-accelerated processor to the general-purpose processor, determining a reaction between the one of the particles and the voxel unit by the general-purpose processor, and adding an extra voxel unit adjacent to the voxel unit based on the determining of the reaction.

Abstract: A semiconductor device with air spacers and air caps and a method of fabricating the same are disclosed. The semiconductor device includes a substrate and a fin structure disposed on the substrate. The fin structure includes a first fin portion and a second fin portion. The semiconductor device further includes a source/drain (S/D) region disposed on the first fin portion, a contact structure disposed on the S/D region, a gate structure disposed on the second fin portion, an air spacer disposed between a sidewall of the gate structure and the contact structure, a cap seal disposed on the gate structure, and an air cap disposed between a top surface of the gate structure and the cap seal.

Abstract: Semiconductor device structures and method for forming the same are provided. The semiconductor device structure includes a substrate and a gate stack formed over the substrate. The semiconductor device structure further includes a source/drain structure formed adjacent to the gate stack and a contact structure vertically overlapping the source/drain structure. In addition, the contact structure has a first sidewall slopes downwardly from its top surface to its bottom surface, and an angle between the first sidewall and a bottom surface of the contact structure is smaller than 89.5°.

Abstract: An energy storage system and an operating method thereof are provided. The energy storage system provides power regulation for the power grid. The energy storage system includes an energy storage unit, a measurement unit and a control unit. The measurement unit measures the operating frequency of the power grid. When the operating frequency is between the third frequency and the third frequency boundary value, the control unit configures the regulation ratio of the power regulation to be less than or equal to the second output boundary value and greater than or equal to the second operating ratio. The third frequency boundary value is less than the first frequency boundary value. The second operating ratio is greater than the first operating ratio, and the efficiency of supplying power at the second operating ratio is greater than that at the first operating ratio by an efficiency threshold.

Abstract: An energy storage system and an operating method thereof are provided. The energy storage system provides power regulation for the power grid. The energy storage system includes an energy storage unit, a measurement unit and a control unit. The measurement unit measures the operating frequency of the power grid. When the operating frequency is between the third frequency boundary value and the fourth frequency, the control unit configures the regulation ratio of the power regulation to be less than or equal to the second operating ratio and greater than or equal to the second input boundary value. The second operating ratio is less than the first operating ratio, and the efficiency of charging the energy storage unit by the power grid at the second operating ratio is greater than that at the first operating ratio by an efficiency threshold.

Abstract: Various embodiments of the present disclosure are directed towards an image sensor including a plurality of photodetectors in a substrate. The substrate comprises a first surface opposite a second surface. An outer isolation structure is disposed in the substrate and laterally surrounds the plurality of photodetectors. The outer isolation structure has a first height. An inner isolation structure is spaced between sidewalls of the outer isolation structure. The inner isolation structure is disposed between adjacent photodetectors in the plurality of photodetectors. The outer isolation structure and the inner isolation structure respectively extend from the second surface toward the first surface. The inner isolation structure comprises a second height less than the first height.

Abstract: An energy storage system and an operating method thereof are provided. The energy storage system provides power regulation for the power grid. The energy storage system includes an energy storage unit, a measurement unit and a control unit. The measurement unit measures the operating frequency of the power grid. The control unit configures the energy storage system to provide the power regulation in a first power regulation mode during a first period according to at least one of an operation target, the operating frequency of the power grid, and the state of charge of the energy storage unit. The control unit compares an operation effect with the operation target and configures the energy storage system to provide the power regulation in a second power regulation mode during a second period. The operation target includes at least one of a contracted regulation power amount and a contracted regulation time.

Abstract: An energy storage system and an operating method thereof are provided. The energy storage system provides power regulation for the power grid. The energy storage system includes an energy storage unit, a measurement unit and a control unit. The measurement unit measures the operating frequency of the power grid, and the control unit receives the operating frequency measured by the measurement unit. When the operating frequency is greater than or equal to a first frequency boundary value and less than or equal to a second frequency boundary value, the control unit configures the regulation ratio of the power regulation to be a first operating ratio which is less than or equal to 0 and greater than or equal to the first input boundary value. The first frequency boundary value is less than the first frequency, and/or the second frequency boundary value is greater than the second frequency.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate, a conductive feature on the substrate, and an electrical connection structure on the conductive feature. The electrical connection includes a first grain made of a first metal material, and a first inhibition layer made of a second metal layer that is different than the first metal material. The first inhibition layer extends vertically along a first side of a grain boundary of the first grain and laterally along a bottom of the grain boundary of the first grain.

Abstract: A memory device includes a plurality of memory cells; a word line, connected to one of the plurality of memory cells, that is configured to provide a first WL pulse having a rising edge and a falling edge that define a pulse width of the first WL pulse; a first tracking WL, formed adjacent to the memory cells, that is configured to provide, via being physically or operatively coupled to a bit line (BL) configured to write a logic state to the memory cell, a second WL pulse having a rising edge with a decreased slope; and a first tracking BL, configured to emulate the BL, that is coupled to the first tracking WL such that the pulse width of the first WL pulse is increased based on the decreased slope of the rising edge of the second WL pulse.

Abstract: In a method of manufacturing a semiconductor device, in an EUV scanner, an EUV lithography operation using an EUV mask is performed on a photo resist layer formed over a semiconductor substrate. After the EUV lithography operation, the EUV mask is unloaded from a mask stage of the EUV scanner. The EUV mask is placed under a reduced pressure below an atmospheric pressure. The EUV mask is heated under the reduced pressure at a first temperature in a range from 100° C. to 350 C°. After the heating, the EUV mask is stored in a mask stocker.

Abstract: A meta optical device is provided. The meta optical device includes an array of meta structures. Each of the meta structures includes a plurality of stacked layers at least including a first layer with a first refractive index and a second layer with a second refractive index. The first refractive index and the second refractive index are different.

Abstract: An antenna structure and an electronic device are proposed. The antenna structure includes a feeding source, a main radiation portion, a grounding portion and a floating portion. The main radiation portion is connected to the feeding source and extends toward a first direction. The grounding portion is connected to a grounding layer, and a first gap is formed between the grounding portion and the main radiation portion. The grounding portion extends toward the first direction. A second gap is formed between the floating portion and the grounding portion. The floating portion extends toward the first direction. The main radiation portion, the grounding portion and the floating portion are arranged sequentially along a second direction.

Abstract: A semiconductor device includes a substrate having a first planar region, a second planar region adjacent to the first planar region, a non-planar region between the first planar region and the second planar region, a first base on the first planar region, a second base on the second planar region, and a plurality of bumps on the non-planar region. Preferably, the bumps have different heights, top surfaces of the first base and the second base are coplanar, the top surface of the bumps is lower than the top surface of the first base, and the height of the bumps closer to the first planar region is greater than the height of the bumps closer to the non-planar region.

Abstract: An antenna switching circuitry set includes an antenna, a switching circuitry, a specific function circuitry, and a first inductor. The antenna includes a first radiating element having a connection end and an open end. The switching circuitry is electrically connected to the connection end of the first radiating element through a first path. The specific function circuitry is electrically connected to the connection end of the first radiating element through a second path and is configured to provide a specific function. A specific function signal having a specific function frequency is transmitted between the first radiating element and the specific function circuitry. One end of the first inductor is connected in parallel with the first path, and the other end of the first inductor is connected to a ground.

Abstract: A device includes a first vertical stack of nanostructures over a substrate, a second vertical stack of nanostructures over the substrate, a wall structure between and in direct contact with the first and second vertical stacks, a gate structure wrapping around three sides of the nanostructures and a source/drain region beside the first vertical stack of nanostructures.

Abstract: A semiconductor device structure and a method for forming a semiconductor device structure are provided. The method includes forming a metal gate stack wrapped around multiple semiconductor nanostructures. The metal gate stack has a gate dielectric layer and a gate electrode, and the semiconductor nanostructures are adjacent to an epitaxial structure. The method also includes recessing the gate dielectric layer, and a protruding portion of the gate electrode protrudes from a top surface of the gate dielectric layer after the gate dielectric layer is recessed. The method further includes forming a protective structure over the epitaxial structure, and the protective structure laterally surrounds the protruding portion of the gate electrode. In addition, the method includes forming a conductive contact electrically connected to the epitaxial structure and penetrating through the protective structure.

Abstract: The present disclosure provides a system and method for enabling cableless connections within a server system. The server system comprises a motherboard (MB) module, a power distribution board (PDB) module, power supply unit (PSU) modules, network interface controller (NIC) modules, fan modules, graphic process unit (GPU) modules, and a hyperscale GPU accelerator (HGX) platform. These components of the server system are interconnected by a plurality of circuit boards. The plurality of circuit boards includes, but is not limited to, a main board, linking boards (BDs), a PDB, a fan board, a power linking board, peripheral-component-interconnect-express (PCIe) expander boards, a plurality of NVLink bridges, and HGX base boards.