Patents by Inventor Hao Chen

Hao Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10073135
    Abstract: Among other things, one or more techniques or systems for evaluating a tiered semiconductor structure, such as a stacked CMOS structure, for misalignment are provided. In an embodiment, a connectivity test is performed on vias between a first layer and a second layer to determine a via diameter and a via offset that are used to evaluate misalignment. In an embodiment, a connectivity test for vias within a first layer is performed to determine an alignment rotation based upon which vias are connected through a conductive arc within a second layer or which vias are connected to a conductive pattern out of a set of conductive patterns. In this way, the via diameter, the via offset, or the alignment rotation are used to evaluate the tiered semiconductor structure, such as during a stacked CMOS process, for misalignment.
    Type: Grant
    Filed: May 22, 2017
    Date of Patent: September 11, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
    Inventors: Mill-Jer Wang, Ching-Nen Peng, Hung-Chih Lin, Hao Chen, Mincent Lee
  • Patent number: 10073293
    Abstract: An optical microcavity for a high-contrast display comprises an enclosed cavity having a front wall and a back wall, where the front wall comprises a pinhole opening for emission of light from the cavity and the back wall is configured to generate or transmit light into the cavity. An outer surface of the front wall absorbs some or substantially all optical wavelengths of externally incident light so as to appear black or colored. An inner surface of the front wall comprises a light reflectivity of greater than 90% to promote photon recycling within the cavity and light emission through the pinhole opening.
    Type: Grant
    Filed: April 11, 2017
    Date of Patent: September 11, 2018
    Assignee: The Board of Trustees of the University of Illinois
    Inventors: Paul V. Braun, Osman S. Cifci, Eric S. Epstein, Hao Chen, Lu Xu, Ralph G. Nuzzo
  • Publication number: 20180255074
    Abstract: A method for managing cloud based applications is described. In one embodiment, the method includes detecting initiation of an application, detecting an action performed relative to the application, capturing the data associated with the detected action before the application encrypts the at least portion of the data, analyzing the captured data, and applying a network management policy to a packet flow based at least in part on the analyzing the captured data. In some cases, the application is configured to encrypt at least a portion of data associated with the detected action.
    Type: Application
    Filed: March 1, 2017
    Publication date: September 6, 2018
    Applicant: Symantec Corporation
    Inventors: Qing Li, Joseph Chen, Torrey Umland, Dave Stahl, Tigran Grigoryan, Min Hao Chen
  • Patent number: 10070279
    Abstract: Network apparatuses and a message providing method are provided. A network apparatus includes a processor, network interface, and display screen. The processor executes a message transmission application. The network interface transceives at least one message of the message transmission application. The display screen displays a window of the message transmission application. The window includes at least one icon and the at least one message. The processor determines that a selected icon of the at least one icon corresponds to a selected message of the at least one message. The processor derives at least one keyword by analyzing the selected message according to a semantic analysis rule corresponding to the selected icon. The processor derives at least one recommended message by searching a database according to the at least one keyword. The display screen displays the at least one recommended message.
    Type: Grant
    Filed: October 10, 2016
    Date of Patent: September 4, 2018
    Assignee: Institute For Information Industry
    Inventors: Yu-Hao Chen, Bo-Jiun Hsu, Ya-Wen Hsu
  • Patent number: 10067181
    Abstract: A testing holder for a chip unit, a multi site holding frame for plural chip units and a method for testing a die thereof are provided. The proposed multi site holding frame for testing plural chip units simultaneously includes a first holder frame having a plurality of testing holders. Each of the plurality of testing holders includes a holder body containing a specific one of the plural chip units, and a pressure releasing device formed on the holder body to release an insertion pressure when the specific one of the plural chip units is inserted in the holder body.
    Type: Grant
    Filed: May 12, 2017
    Date of Patent: September 4, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Mill-Jer Wang, Kuo-Chuan Liu, Ching-Nen Peng, Hung-Chih Lin, Hao Chen
  • Publication number: 20180247568
    Abstract: Apparatus and method for smart sand table demonstration are provided. The demonstration apparatus includes: a sand table base, a sensor device, a demonstration device and a controller. The sensor device is placed on the sand table base which is also used as a demonstration carrier for the demonstration device. The sensor device includes a sensor module and a first wireless communication module, for monitoring a status of the sensor module and transmit the status information to the controller through a wireless connection. The controller determines demonstration information based at least one of smart demonstration project information and the status information, and transmits the demonstration information to the demonstration device. The demonstration device analyzes the received demonstration information and performs demonstration actions.
    Type: Application
    Filed: February 26, 2018
    Publication date: August 30, 2018
    Inventors: Zhenshan WANG, Hao CHEN, Xi LI, Kejia PAN, Bin FENG
  • Publication number: 20180246468
    Abstract: Embodiments of the present disclosure provide a holographic display device. The holographic display device includes a spatial light modulator and a light source unit. The light source unit is provided on the light entry side of the spatial light modulator and configured to providing read-out light to the spatial light modulator. The spatial light modulator includes at least one loading portion for receiving a write-in signal, which comprises a plurality of pixel units arranged in a matrix form, and the light exit surface of at least a part of which is a first cambered surface protruding in a direction away from the light source unit.
    Type: Application
    Filed: February 27, 2018
    Publication date: August 30, 2018
    Inventor: Hao CHEN
  • Patent number: 10063670
    Abstract: The application provides a route synchronization method and an apparatus. The method includes: receiving, by a first FEF, an entire network address request message sent by a second FEF, where the entire network address request message includes an MAC address and an FC network segment of the second FEF; parsing, by the first FEF, the entire network address request message, acquiring the MAC address and the FC network segment of the second FEF, and storing the MAC address and the FC network segment of the second FEF in a routing table of the first FEF; and sending, by the first FEF, a response message to the second FEF, where the response message includes a MAC address and an FC network segment of the first FEF. Thus, distributed routing of an FCoE network is implemented, and scalability of the FCoE network is improved.
    Type: Grant
    Filed: August 28, 2014
    Date of Patent: August 28, 2018
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Hao Chen, Wei Song, Xingfeng Jiang
  • Publication number: 20180238822
    Abstract: A gas sensing apparatus including a gas sensor, a gas determining circuit and a gas database is provided. The gas sensor includes at least two nanowire sensors. The gas sensor is configured to sense multiple gases and output a plurality of sensing signals. The gas determining circuit is coupled to the gas sensor. The gas determining circuit is configured to receive the sensing signals and determine types of the gases according to reference data and the sensing signals. The gas database is coupled to the gas determining circuit. The gas database stores the reference data and outputs the reference data to the gas determining circuit. Each of the nanowire sensors includes at least one nanowire. Structural properties of the nanowires are different.
    Type: Application
    Filed: April 18, 2018
    Publication date: August 23, 2018
    Applicant: Industrial Technology Research Institute
    Inventors: Kuan-Wei Chen, Chih-Sheng Lin, Erh-Hao Chen, Sih-Han Li, Shyh-Shyuan Sheu
  • Publication number: 20180236437
    Abstract: A carbon dioxide absorbent composition is disclosed. Based on 100 parts by weight of the carbon dioxide absorbent composition, the carbon dioxide absorbent composition includes 5 to 45 parts by weight of sodium 2-[(2-aminoethyl)amino]ethanesulfonate. Moreover, a method for capturing carbon dioxide using the carbon dioxide absorbent composition is disclosed.
    Type: Application
    Filed: August 17, 2017
    Publication date: August 23, 2018
    Inventors: Chung-Sung TAN, Hao CHEN, Wei-Han HSIAO
  • Publication number: 20180239862
    Abstract: A method is disclosed that includes: if there is a conflict graph including a sub-graph representing that each spacing between any two of three adjacent patterns of quadruple-patterning (QP) patterns in at least one of two abutting cells is smaller than a threshold spacing, performing operations including: identifying if one of edges that connect the three adjacent patterns of QP patterns to one another is constructed along, and/or in parallel with, a boundary between the two abutting cells; modifying multiple-patterning patterns of a layout of an integrated circuit (IC) to exclude patterns representing the sub-graph; and initiating generation of the IC from the modified multiple-patterning patterns, wherein at least one operation of identifying , modifying, or initiating is performed by at least one processor.
    Type: Application
    Filed: April 25, 2018
    Publication date: August 23, 2018
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Meng-Kai HSU, Yuan-Te HOU, Wen-Hao CHEN
  • Publication number: 20180241034
    Abstract: A nanoparticle and a method for fabricating the nanoparticle utilize a decomposable material yoke located within permeable organic polymer material shell and separated from the permeable organic polymer material shell by a void space. When the decomposable material yoke comprises a sulfur material and the permeable organic polymer material shell comprises a material permeable to both a sulfur material vapor and a lithium ion within a battery electrolyte the nanoparticle may be used within an electrode for a Li/S battery absent the negative effects of battery electrode materials expansion.
    Type: Application
    Filed: August 30, 2017
    Publication date: August 23, 2018
    Applicant: CORNELL UNIVERSITY
    Inventors: Yingchao Yu, Weidong Zhou, Hao Chen, Hector D. Abruna
  • Publication number: 20180234303
    Abstract: Aspects of the present invention include a method, which includes receiving, by a processor, data from one or more communicatively coupled objects associated with a device. The method further includes providing, by the processor, context information to the received data. The method further includes mapping, by the processor, the context information associated with the received data to one or more nodes of a knowledge graph. The method further includes diagnosing, by the processor, a problem with the device, based on knowledge graph information.
    Type: Application
    Filed: February 13, 2017
    Publication date: August 16, 2018
    Inventors: Hao Chen, Shao C. Li, Qi C. Li, Jie Ma, Li J. Mei, Xin Zhang
  • Publication number: 20180233490
    Abstract: A three-dimensional (3D) integrated circuit (IC) die is provided. In some embodiments, a first IC die comprises a first semiconductor substrate, a first interconnect structure over the first semiconductor substrate, and a first hybrid bond (HB) structure over the first interconnect structure. The first HB structure comprises a HB link layer and a HB contact layer extending from the HB link layer to the first interconnect structure. A second IC die is over the first IC die, and comprises a second semiconductor substrate, a second HB structure, and a second interconnect structure between the second semiconductor substrate and the second HB structure. The second HB structure contacts the first HB structure. A seal-ring structure is in the first and second IC dies. Further, the seal-ring structure extends from the first semiconductor substrate to the second semiconductor substrate, and is defined in part by the HB contact layer.
    Type: Application
    Filed: April 17, 2018
    Publication date: August 16, 2018
    Inventors: Yi-Shin Chu, Kuan-Chieh Huang, Pao-Tung Chen, Shuang-Ji Tsai, Yi-Hao Chen, Feng-Kuei Chang
  • Publication number: 20180233128
    Abstract: Procedure dialogs are improved through knowledge mining within a reinforcement learning framework. Taking an existing procedure dialog as input, a machine learning model is generated. User interactions with the machine learning model are monitored and used to update the machine learning model. The updates to the machine learning model are applied to the existing procedure dialog for review and revision by subject matter experts.
    Type: Application
    Filed: February 10, 2017
    Publication date: August 16, 2018
    Inventors: Hao CHEN, Qi Cheng LI, Shao Chun LI, Jie MA, Li Jun MEI
  • Patent number: 10049983
    Abstract: A system and method for a semiconductor device are provided. An embodiment comprises a dielectric layer, a hard mask layer over the dielectric layer, and a capping layer over the hard mask layer. A multi-patterning process is performed to form an interconnect using the capping layer as a mask to form an opening for the interconnect.
    Type: Grant
    Filed: January 4, 2016
    Date of Patent: August 14, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cha-Hsin Chao, Chih-Hao Chen, Hsin-Yi Tsai
  • Patent number: 10050712
    Abstract: A method and a device for determining a location of an optical splitter are provided. With the method, optical network units in a PON network are classified into K clusters based on locations of the optical network units with a K-means clustering-based algorithm. Distances between multiple optical network units in the same cluster are small. If it is determined that the number of the optical network units in each of the clusters does not exceed a threshold, a central office is added into the K clusters to obtain K new clusters; and for each of the new clusters, a location of an optical splitter corresponding to the new cluster is determined, so as to ensure that a sum of distances between the location of the optical splitter and locations of all elements in the new cluster is minimized.
    Type: Grant
    Filed: November 2, 2015
    Date of Patent: August 14, 2018
    Assignee: SOOCHOW UNIVERSITY
    Inventors: Gangxiang Shen, Hao Chen, Yongcheng Li
  • Patent number: 10047550
    Abstract: A lockset is actuable by pivoting a handle about a longitudinal axis of the lockset by rotating the handle and by pivoting the handle about an axis transverse to the lockset axis, such as by pushing or pulling. The lockset includes an inside handle and an outside handle, each associated with an independent mechanism, each of which can independently actuate the lockset. A locking mechanism prevents actuation of a first one of the independent handle mechanisms without affecting operation of the other handle mechanism. Upon actuation of the other handle mechanism, a retractor engages a surface of the locking mechanism and removes it from engagement with the first locking mechanism. An adjustment ring has a first configuration that centers the lockset in a door having a first standard thickness and a second configuration that centers the lockset in a door having a second standard thickness.
    Type: Grant
    Filed: November 5, 2015
    Date of Patent: August 14, 2018
    Assignee: Hampton Products International Corporation
    Inventors: Xin Ben Ou, Xin Min Ou, Han Gui Xiao, Zhi Man Yuan, Shi Hao Chen, Guo Hua Liu
  • Publication number: 20180224803
    Abstract: A backlight module, a spatial light modulator, a holographic display device and a holographic display method therefor are disclosed. The backlight module includes: a light source; an optical conversion element arranged to face the light source and configured to convert a light beam emitted by the light source into coherent collimated light; and a light switch layer disposed at a side of the optical conversion element away from the light source. The optical conversion element includes a plurality of sub-optical conversion regions. The light switch layer includes a plurality of sub-light switches, the plurality of sub-light switches and the plurality of sub-optical conversion regions being disposed in one-to-one correspondence.
    Type: Application
    Filed: September 15, 2017
    Publication date: August 9, 2018
    Inventors: Hao Chen, Bingchuan Shi
  • Patent number: 10043790
    Abstract: A diode device of a transient voltage suppressor (TVS) is disclosed. The diode device includes a substrate, a first well, a second well, a first electrode and a second electrode. The substrate has a first surface. The first well is formed in the substrate and near the first surface. The second well is formed in the substrate and near the first surface. There is a gap between the first well and the second well. The first electrode is electrically connected with the first well. The second electrode is electrically connected with the second well. A current path is formed from the first electrode, the first well, the substrate, the second well to the second electrode. The current path passes through a plurality of PN junctions to form an equivalent circuit having a plurality of equivalent capacitances coupled in series.
    Type: Grant
    Filed: April 26, 2016
    Date of Patent: August 7, 2018
    Assignee: UBIQ SEMICONDUCTOR CORP.
    Inventor: Chih-Hao Chen