Patents by Inventor Hao-Chieh Lee
Hao-Chieh Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11948722Abstract: A planar winding transformer includes a magnetic core set and a multilayer circuit board. The magnetic core set includes two magnetic cores and two magnetic columns. The two magnetic cores are parallel to each other. The multilayer circuit board is disposed between two magnetic cores, and two magnetic columns penetrate through the multilayer circuit board. The multilayer circuit board includes two low voltage winding layers and one high voltage winding layer. Two low voltage winding layers are connected to each other in parallel, and the high voltage winding layer is disposed between two low voltage winding layers. When the high voltage winding layer receives a polarity current, at least one of the low voltage winding layers generates a corresponding induced current. Two magnetic cores and two magnetic columns form a closed path for magnetic flux.Type: GrantFiled: January 8, 2021Date of Patent: April 2, 2024Assignees: CHICONY POWER TECHNOLOGY CO., LTD., NATIONAL TAIPEI UNIVERSITY OF TECHNOLOGYInventors: Yen-Shin Lai, Yong-Yi Huang, Chun-Hung Lee, Hao-Chieh Chang
-
Publication number: 20180285950Abstract: A transaction method of online shopping and a transaction system thereof are provided. A buyer and a seller respectively deposit guarantee money (or membership fee) to a third party financial institution in advance, so that the buyer and the seller are qualified to conduct online transactions at a shopping platform. After the online transactions are completed (i.e., the transactions between the buyer and the seller are correctly completed), the third party financial institution respectively returns the guarantee money (or the deposited membership fee) to the buyer and the seller. Accordingly, the present disclosure is advantageous to minimize the risk of fraudulent buyers and sellers, thereby protecting financial transactions conducted between the both parties.Type: ApplicationFiled: March 29, 2017Publication date: October 4, 2018Inventor: HAO-CHIEH LEE
-
Patent number: 9809156Abstract: A safety indicating apparatus is provided for a vehicle that includes a turn direction manual switch, a turn direction detector, two turn signal indicator lamps, and a turn signal control module. The turn signal control module is configured for operatively determining whether the desired turn direction indicated by the desired turn signal is corresponding to the actual turn direction indicated by the actual turn signal while the operator turns the vehicle. Accordingly, the turn signal control module can automatically turn on/off the turn signal indicator lamps in response to the actual turn direction of the vehicle to avoid a near miss or a traffic accident.Type: GrantFiled: December 10, 2015Date of Patent: November 7, 2017Inventor: Hao-Chieh Lee
-
Publication number: 20170166112Abstract: A safety indicating apparatus is provided for a vehicle that includes a turn direction manual switch, a turn direction detector, two turn signal indicator lamps, and a turn signal control module. The turn signal control module is configured for operatively determining whether the desired turn direction indicated by the desired turn signal is corresponding to the actual turn direction indicated by the actual turn signal while the operator turns the vehicle. Accordingly, the turn signal control module can automatically turn on/off the turn signal indicator lamps in response to the actual turn direction of the vehicle to avoid a near miss or a traffic accident.Type: ApplicationFiled: December 10, 2015Publication date: June 15, 2017Inventor: HAO-CHIEH LEE
-
Patent number: 9075267Abstract: A liquid crystal display panel including a first substrate, an active device array, a gate driver on array (GOA), at least one signal transmission connection pad, a second substrate, an opposite electrode layer, conduction devices, and a display medium is provided. The active device array includes scan lines, data lines, and active devices. The GOA is electrically connected to the scan lines. The signal transmission connection pads are located respectively at a first side of the active device array and a second side of the active device array. The first side and the second side are corresponding to two opposite ends of the scan lines, respectively. The conduction devices and the display medium are disposed between the first substrate and the second substrate. The signal transmission connection pads are electrically connected to the opposite electrode layer through the conduction devices.Type: GrantFiled: March 23, 2012Date of Patent: July 7, 2015Assignee: Au Optronics CorporationInventors: Hao-Chieh Lee, Yi-Suei Liao
-
Patent number: 8692754Abstract: A LCD panel includes an invisible zone and a visible zone. The invisible zone includes a gate driver and a wiring zone, wherein the gate driver sequentially outputs six pulse signals. By the wiring zone, a first pulse signal is converted into a first gate driving signal of the visible zone, a second pulse signal is converted into a fourth gate driving signal of the visible zone, a third pulse signal is converted into a fifth gate driving signal of the visible zone, a fourth pulse signal is converted into a second gate driving signal of the visible zone, a fifth pulse signal is converted into a third gate driving signal of the visible zone, and a sixth pulse signal is converted into a sixth gate driving signal of the visible zone.Type: GrantFiled: June 22, 2011Date of Patent: April 8, 2014Assignee: AU Optronics Corp.Inventors: Hao-Chieh Lee, Yi-Suei Liao, Yih-Jen Hsu
-
Patent number: 8497832Abstract: A flat panel display, a shift register with image retention release and method for releasing image retention are provided. An output end of the shift register couples to a gate line of a display panel. A first end of a first transistor couples to the output end of the shift register. A second end of the first transistor couples to a system voltage VDD or a reference voltage VSS. A first end of a capacitor couples to a control end of the first transistor. A second end of the capacitor couples to the reference voltage VSS. During a power-off period, the reference voltage VSS is pulled high for turning on the first transistor, therefore the voltage of the gate line is pulled high.Type: GrantFiled: December 21, 2009Date of Patent: July 30, 2013Assignee: Au Optronics CorporationInventors: Chen-Lun Chiu, Hao-Chieh Lee, Yi-Suei Liao, Chien-Liang Chen
-
Publication number: 20130120328Abstract: A liquid crystal display panel including a first substrate, an active device array, a gate driver on array (GOA), at least one signal transmission connection pad, a second substrate, an opposite electrode layer, conduction devices, and a display medium is provided. The active device array includes scan lines, data lines, and active devices. The GOA is electrically connected to the scan lines. The signal transmission connection pads are located respectively at a first side of the active device array and a second side of the active device array. The first side and the second side are corresponding to two opposite ends of the scan lines, respectively. The conduction devices and the display medium are disposed between the first substrate and the second substrate. The signal transmission connection pads are electrically connected to the opposite electrode layer through the conduction devices.Type: ApplicationFiled: March 23, 2012Publication date: May 16, 2013Applicant: AU OPTRONICS CORPORATIONInventors: Hao-Chieh Lee, Yi-Suei Liao
-
Patent number: 8421760Abstract: A touch panel display including a first substrate, a second substrate, a display medium and a touch device is provided. The first substrate has a display area and a peripheral area. The first substrate has a pixel array in the display area and at least one integrated driving circuit in the peripheral area. The integrated driving circuit is electrically connected to the pixel array. The second substrate is disposed above the first substrate to cover the integrated driving circuit and the pixel array. The display medium is disposed on the pixel array and located between the first substrate and the second substrate. The touch device is disposed on the second substrate, and has a sensor element and a wiring element connected to the sensor element. The sensor element is located above the pixel array and the wiring element is located above at least a portion of the integrated driving circuit.Type: GrantFiled: August 12, 2009Date of Patent: April 16, 2013Assignee: Au Optronics CorporationInventors: Po-Yuan Liu, Hao-Chieh Lee, Chien-Liang Chen, Chun-Ku Kuo
-
Publication number: 20120134460Abstract: An exemplary layout structure of a shift register circuit includes a first shift register and a second shift register arranged adjacent to the first shift register. The first shift register and the second shift register each receive a first signal and a second signal phase-inverted with respect to the first signal. Moreover, the first shift register and the second shift register share a common signal routing trace for receiving the first signal. The common signal routing trace is arranged extending into between the first shift register and the second shift register.Type: ApplicationFiled: April 20, 2011Publication date: May 31, 2012Applicant: AU OPTRONICS CORP.Inventors: Ying-Chen CHEN, Hao-Chieh Lee, Chun-Huan Chang, Chun-Hsin Liu, Wan-Jung Chen
-
Publication number: 20120120034Abstract: A LCD panel includes an invisible zone and a visible zone. The invisible zone includes a gate driver and a wiring zone, wherein the gate driver sequentially outputs six pulse signals. By the wiring zone, a first pulse signal is converted into a first gate driving signal of the visible zone, a second pulse signal is converted into a fourth gate driving signal of the visible zone, a third pulse signal is converted into a fifth gate driving signal of the visible zone, a fourth pulse signal is converted into a second gate driving signal of the visible zone, a fifth pulse signal is converted into a third gate driving signal of the visible zone, and a sixth pulse signal is converted into a sixth gate driving signal of the visible zone.Type: ApplicationFiled: June 22, 2011Publication date: May 17, 2012Applicant: AU OPTRONICS CORP.Inventors: Hao-Chieh LEE, Yi-Suei Liao, Yih-Jen Hsu
-
Publication number: 20110102310Abstract: A flat panel display, a shift register with image retention release and method for releasing image retention are provided. An output end of the shift register couples to a gate line of a display panel. A first end of a first transistor couples to the output end of the shift register. A second end of the first transistor couples to a system voltage VDD or a reference voltage VSS. A first end of a capacitor couples to a control end of the first transistor. A second end of the capacitor couples to the reference voltage VSS. During a power-off period, the reference voltage VSS is pulled high for turning on the first transistor, therefore the voltage of the gate line is pulled high.Type: ApplicationFiled: December 21, 2009Publication date: May 5, 2011Applicant: AU OPTRONICS CORPORATIONInventors: Chen-Lun Chiu, Hao-Chieh Lee, Yi-Suei Liao, Chien-Liang Chen
-
Patent number: 7923312Abstract: A fabricating method of a TFT includes first forming a source on a substrate. Then, a first insulation pattern layer is formed to cover parts of the source and the substrate. The first insulation pattern layer has an opening exposing a part of the source. Thereafter, a gate pattern layer is formed on the first insulation pattern layer. Then, the gate pattern layer and a second insulation pattern layer formed thereon surround the opening. Moreover, a second lateral protection wall is formed on an edge of the gate pattern layer in the opening. Afterwards, a channel layer is formed in the opening and covers the second lateral protection wall and the source. Then, a passivation layer with a contact window is formed on the channel layer and the second insulation pattern layer to expose a portion of the channel layer. Thereafter, a drain is formed on the exposed channel layer.Type: GrantFiled: February 4, 2010Date of Patent: April 12, 2011Assignee: Au Optronics CorporationInventors: Wei-Hsiang Lo, Hao-Chieh Lee
-
Publication number: 20100302178Abstract: A touch panel display including a first substrate, a second substrate, a display medium and a touch device is provided. The first substrate has a display area and a peripheral area. The first substrate has a pixel array in the display area and at least one integrated driving circuit in the peripheral area. The integrated driving circuit is electrically connected to the pixel array. The second substrate is disposed above the first substrate to cover the integrated driving circuit and the pixel array. The display medium is disposed on the pixel array and located between the first substrate and the second substrate. The touch device is disposed on the second substrate, and has a sensor element and a wiring element connected to the sensor element. The sensor element is located above the pixel array and the wiring element is located above at least a portion of the integrated driving circuit.Type: ApplicationFiled: August 12, 2009Publication date: December 2, 2010Applicant: AU OPTRONICS CORPORATIONInventors: Po-Yuan Liu, Hao-Chieh Lee, Chien-Liang Chen, Chun-Ku Kuo
-
Patent number: 7778379Abstract: A shift register apparatus is provided. The pull-down unit of each of the shift registers in the shift register apparatus is controlled by itself, previous, and next two shift registers to enhance the ability of pull-down and voltage regulating. Therefore, the circuit structure of each of the shift registers does not need to be designed a large compensation capacitor therein to substantially restrain the coupling noise effect caused by the clock signal, and thus permitting that each of the shift registers can be collocated with a small compensation capacitor to enhance the output capability thereof.Type: GrantFiled: December 22, 2008Date of Patent: August 17, 2010Assignee: Au Optronics CorporationInventors: Yi-Suei Liao, Chien-Liang Chen, Chen-Lun Chiu, Hao-Chieh Lee, Kuan-Yu Chen
-
Patent number: 7746429Abstract: A liquid crystal display (LCD) panel including a thin film transistor (TFT) array substrate, a color filter substrate, a sealant, and a liquid crystal layer is provided. The TFT array substrate includes a substrate, a plurality of pixel structures, a plurality of scan lines, a plurality of data lines, and a light-shielding pattern. The scan lines and data lines are disposed on the substrate for controlling the operation of the pixel structures. The light-shielding pattern arranged on the periphery of the panel traverses the scan lines and data lines and is electrically insulated from the scan lines and data lines. The sealant is sandwiched between the TFT array substrate and the color filter substrate and is corresponding to the light-shielding pattern. The liquid crystal layer is disposed between the TFT array substrate, the color filter substrate, and the sealant.Type: GrantFiled: November 26, 2006Date of Patent: June 29, 2010Assignee: Au Optronics CorporationInventors: Hao-Chieh Lee, Ming-Hung Shih
-
Publication number: 20100136753Abstract: A fabricating method of a TFT includes first forming a source on a substrate. Then, a first insulation pattern layer is formed to cover parts of the source and the substrate. The first insulation pattern layer has an opening exposing a part of the source. Thereafter, a gate pattern layer is formed on the first insulation pattern layer. Then, the gate pattern layer and a second insulation pattern layer formed thereon surround the opening. Moreover, a second lateral protection wall is formed on an edge of the gate pattern layer in the opening. Afterwards, a channel layer is formed in the opening and covers the second lateral protection wall and the source. Then, a passivation layer with a contact window is formed on the channel layer and the second insulation pattern layer to expose a portion of the channel layer. Thereafter, a drain is formed on the exposed channel layer.Type: ApplicationFiled: February 4, 2010Publication date: June 3, 2010Applicant: AU OPTRONICS CORPORATIONInventors: Wei-Hsiang Lo, Hao-Chieh Lee
-
Publication number: 20100134234Abstract: A shift register apparatus is provided. The pull-down unit of each of the shift registers in the shift register apparatus is controlled by itself, previous, and next two shift registers to enhance the ability of pull-down and voltage regulating. Therefore, the circuit structure of each of the shift registers does not need to be designed a large compensation capacitor therein to substantially restrain the coupling noise effect caused by the clock signal, and thus permitting that each of the shift registers can be collocated with a small compensation capacitor to enhance the output capability thereof.Type: ApplicationFiled: December 22, 2008Publication date: June 3, 2010Applicant: AU OPTRONICS CORPORATIONInventors: Yi-Suei Liao, Chien-Liang Chen, Chen-Lun Chiu, Hao-Chieh Lee, Kuan-Yu Chen
-
Patent number: 7709886Abstract: A fabricating method of a TFT includes first forming a source on a substrate. Then, a first insulation pattern layer is formed to cover parts of the source and the substrate. The first insulation pattern layer has an opening exposing a part of the source. Thereafter, a gate pattern layer is formed on the first insulation pattern layer. Then, the gate pattern layer and a second insulation pattern layer formed thereon surround the opening. Moreover, a second lateral protection wall is formed on an edge of the gate pattern layer in the opening. Afterwards, a channel layer is formed in the opening and covers the second lateral protection wall and the source. Then, a passivation layer with a contact window is formed on the channel layer and the second insulation pattern layer to expose a portion of the channel layer. Thereafter, a drain is formed on the exposed channel layer.Type: GrantFiled: December 4, 2007Date of Patent: May 4, 2010Assignee: Au Optronics CorporationInventors: Wei-Hsiang Lo, Hao-Chieh Lee
-
Patent number: 7528019Abstract: A method of fabricating a thin film transistor of a thin film transistor liquid crystal display is provided. First, a patterned dielectric layer is formed over a substrate. A metallic layer is formed over the substrate to cover the patterned dielectric layer. Thereafter, the metallic layer is planarized until the patterned dielectric layer is exposed. The remained metallic layer serves as a gate. An insulating layer is formed over the patterned dielectric layer and the gate, and then a semiconductor layer is formed over the gate insulating layer above the gate. A source and a drain are formed over the semiconductor layer.Type: GrantFiled: February 16, 2006Date of Patent: May 5, 2009Assignee: AU Optronics Corp.Inventors: Hao-Chieh Lee, Chi-Hsun Hsu