Abstract: A photovoltaic (PV) device with improved blue response. The PV device includes a silicon substrate with an emitter layer on a light receiving side. The emitter layer has a low dopant level such that it has sheet resistance of 90 to 170 ohm/sq. Anti-reflection in the PV device is provided solely by a nano-structured or black silicon surface on the light-receiving surface, through which the emitter is fanned by diffusion. The nanostructures of the black silicon are formed in a manner that does not result in gold or another high-recombina-tion metal being left in the black silicon such as with metal-assisted etching using silver. The black silicon is further processed to widen these pores so as to provide larger nanostruc-tures with lateral dimensions in the range of 65 to 150 nanometers so as to reduce surface area and also to etch away a highly doped portion of the emitter.

Abstract: A photovoltaic (PV) device with improved blue response. The PV device includes a silicon substrate with an emitter layer on a light receiving side. The emitter layer has a low opant level such that it has sheet resistance of 90 to 170 ohm/sq. Anti-reflection in the PV device is provided solely by a nano-structured or black silicon surface on the light-receiving surface, through which the emitter is formed by diffusion. The nano structures of the black silicon are formed in a manner that does not result in gold or another high-recombination metal being left in the black silicon such as with metal-assisted etching using silver. The black silicon is further processed to widen these pores so as to provide larger nanostructures with lateral dimensions in the range of 65 to 150 nanometers so as to reduce surface area and also to etch away a highly doped portion of the emitter.

Abstract: A bi-stable micro-electrical mechanical system (MEMS) heat harvester is provided. A bi-stable MEMS cantilever located between a hot temperature surface and a cold temperature surface, and is made up of a first MEMS material layer, having a first coefficient of thermal expansion. A second MEMS material layer is in contact with the first MEMS material layer, and has a second coefficient of thermal expansion less than the first coefficient of thermal expansion. A tensioner, made from a material having a tensile stress greater than the stress of the first or second MEMS materials, is connected to the cantilever. The heat harvester also includes a mechanical-to-electrical power converter, which may be a piezoelectric device or an electret device. The bi-stable MEMS cantilever may include a thermal expander having a coefficient of thermal expansion greater than the second coefficient of thermal expansion. The thermal expander is connected to the tensioner.

Abstract: Methods of hydrogenation of passivated contacts using materials having hydrogen impurities are provided. An example method includes applying, to a passivated contact, a layer of a material, the material containing hydrogen impurities. The method further includes subsequently annealing the material and subsequently removing the material from the passivated contact.

Abstract: A bi-stable micro-electrical mechanical system (MEMS) heat harvester is provided. A bi-stable MEMS cantilever located between a hot temperature surface and a cold temperature surface, and is made up of a first MEMS material layer, having a first coefficient of thermal expansion. A second MEMS material layer is in contact with the first MEMS material layer, and has a second coefficient of thermal expansion less than the first coefficient of thermal expansion. A tensioner, made from a material having a tensile stress greater than the stress of the first or second MEMS materials, is connected to the cantilever. The heat harvester also includes a mechanical-to-electrical power converter, which may be a piezoelectric device or an electret device. The bi-stable MEMS cantilever may include a thermal expander having a coefficient of thermal expansion greater than the second coefficient of thermal expansion. The thermal expander is connected to the tensioner.

Abstract: Methods of hydrogenation of passivated contacts using materials having hydrogen impurities are provided. An example method includes applying, to a passivated contact, a layer of a material, the material containing hydrogen impurities. The method further includes subsequently annealing the material and subsequently removing the material from the passivated contact.

Abstract: A flat panel photovoltaic (PV) system is provided formed from a first sheet with rows of concentrated III-V photovoltaic (CPV) solar cells. An overlying second sheet is made up of rows of waveguides, where each waveguide is coupled to a corresponding CPV solar cell. A third sheet includes overlying one-piece linear lenses, each having a focal line coupled to the waveguides in a corresponding row. Optionally, a fourth sheet underlies the first sheet, which is a 1-sun solar panel including a plurality of silicon PV cells. In one variation adjacent rows of waveguides couple to the same row of CPV cells. In another variation, each waveguide in a row is optically coupled to waveguides in an adjacent row, which adjacent waveguides are then coupled to a corresponding row of CPV cells. A lens overlies each row of waveguides, with a focal line coupled to each waveguide in that row.

Abstract: A method (50) is provided for processing a graded-density AR silicon surface (14) to provide effective surface passivation. The method (50) includes positioning a substrate or wafer (12) with a silicon surface (14) in a reaction or processing chamber (42). The silicon surface (14) has been processed (52) to be an AR surface with a density gradient or region of black silicon. The method (50) continues with heating (54) the chamber (42) to a high temperature for both doping and surface passivation. The method (50) includes forming (58), with a dopant-containing precursor in contact with the silicon surface (14) of the substrate (12), an emitter junction (16) proximate to the silicon surface (14) by doping the substrate (12). The method (50) further includes, while the chamber is maintained at the high or raised temperature, forming (62) a passivation layer (19) on the graded-density silicon anti-reflection surface (14).

Abstract: A wet-chemical method of producing a black silicon substrate. The method comprising soaking single crystalline silicon wafers in a predetermined volume of a diluted inorganic compound solution. The substrate is combined with an etchant solution that forms a uniform noble metal nanoparticle induced Black Etch of the silicon wafer, resulting in a nanoparticle that is kinetically stabilized. The method comprising combining with an etchant solution having equal volumes acetonitrile/acetic acid:hydrofluoric acid:hydrogen peroxide.

Abstract: A method (50) is provided for processing a graded-density AR silicon surface (14) to provide effective surface passivation. The method (50) includes positioning a substrate or wafer (12) with a silicon surface (14) in a reaction or processing chamber (42). The silicon surface (14) has been processed (52) to be an AR surface with a density gradient or region of black silicon. The method (50) continues with heating (54) the chamber (42) to a high temperature for both doping and surface passivation. The method (50) includes forming (58), with a dopant-containing precursor in contact with the silicon surface (14) of the substrate (12), an emitter junction (16) proximate to the silicon surface (14) by doping the substrate (12). The method (50) further includes, while the chamber is maintained at the high or raised temperature, forming (62) a passivation layer (19) on the graded-density silicon anti-reflection surface (14).

Abstract: A method (50) is provided for processing a graded-density AR silicon surface (14) to provide effective surface passivation. The method (50) includes positioning a substrate or wafer (12) with a silicon surface (14) in a reaction or processing chamber (42). The silicon surface (14) has been processed (52) to be an AR surface with a density gradient or region of black silicon. The method (50) continues with heating (54) the chamber (42) to a high temperature for both doping and surface passivation. The method (50) includes forming (58), with a dopant-containing precursor in contact with the silicon surface (14) of the substrate (12), an emitter junction (16) proximate to the silicon surface (14) by doping the substrate (12). The method (50) further includes, while the chamber is maintained at the high or raised temperature, forming (62) a passivation layer (19) on the graded-density silicon anti-reflection surface (14).

Abstract: Flexible lateral p-i-n (“PIN”) diodes, arrays of flexible PIN diodes and imaging devices incorporating arrays of PIN diodes are provided. The flexible lateral PIN diodes are fabricated from thin, flexible layers of single-crystalline semiconductor. A plurality of the PIN diodes can be patterned into a single semiconductor layer to provide a flexible photodetector array that can be formed into a three-dimensional imaging device.

Abstract: A photovoltaic (PV) device with improved blue response. The PV device includes a silicon substrate with an emitter layer on a light receiving side. The emitter layer has a low opant level such that it has sheet resistance of 90 to 170 ohm/sq. Anti-reflection in the PV device is provided solely by a nano-structured or black silicon surface on the light-receiving surface, through which the emitter is formed by diffusion. The nano structures of the black silicon are formed in a manner that does not result in gold or another high-recombination metal being left in the black silicon such as with metal-assisted etching using silver. The black silicon is further processed to widen these pores so as to provide larger nanostructures with lateral dimensions in the range of 65 to 150 nanometers so as to reduce surface area and also to etch away a highly doped portion of the emitter.

Abstract: A wet-chemical method of producing a black silicon substrate. The method comprising soaking single crystalline silicon wafers in a predetermined volume of a diluted inorganic compound solution. The substrate is combined with an etchant solution that forms a uniform noble metal nanoparticle induced Black Etch of the silicon wafer, resulting in a nanoparticle that is kinetically stabilized. The method comprising combining with an etchant solution having equal volumes acetonitrile/acetic acid:hydrofluoric acid:hydrogen peroxide.

Abstract: Flexible lateral p-i-n (“PIN”) diodes, arrays of flexible PIN diodes and imaging devices incorporating arrays of PIN diodes are provided. The flexible lateral PIN diodes are fabricated from thin, flexible layers of single-crystalline semiconductor. A plurality of the PIN diodes can be patterned into a single semiconductor layer to provide a flexible photodetector array that can be formed into a three-dimensional imaging device.

Abstract: Flexible lateral p-i-n (“PIN”) diodes, arrays of flexible PIN diodes and imaging devices incorporating arrays of PIN diodes are provided. The flexible lateral PIN diodes are fabricated from thin, flexible layers of single-crystalline semiconductor. A plurality of the PIN diodes can be patterned into a single semiconductor layer to provide a flexible photodetector array that can be formed into a three-dimensional imaging device.

Abstract: This invention provides thin film devices that have been processed on their front- and backside. The devices include an active layer that is sufficiently thin to be mechanically flexible. Examples of the devices include back-gate and double-gate field effect transistors, double-sided bipolar transistors and 3D integrated circuits.

Abstract: A method (50) is provided for processing a graded-density AR silicon surface (14) to provide effective surface passivation. The method (50) includes positioning a substrate or wafer (12) with a silicon surface (14) in a reaction or processing chamber (42). The silicon surface (14) has been processed (52) to be an AR surface with a density gradient or region of black silicon. The method (50) continues with heating (54) the chamber (42) to a high temperature for both doping and surface passivation. The method (50) includes forming (58), with a dopant-containing precursor in contact with the silicon surface (14) of the substrate (12), an emitter junction (16) proximate to the silicon surface (14) by doping the substrate (12). The method (50) further includes, while the chamber is maintained at the high or raised temperature, forming (62) a passivation layer (19) on the graded-density silicon anti-reflection surface (14).

Abstract: This invention provides methods for fabricating high speed TFTs from silicon-on-insulator and bulk single crystal semiconductor substrates, such as Si(100) and Si(110) substrates. The TFTs may be designed to have a maximum frequency of oscillation of 3 GHz, or better.

Abstract: This invention provides thin film devices that have been processed on their front- and backside. The devices include an active layer that is sufficiently thin to be mechanically flexible. Examples of the devices include back-gate and double-gate field effect transistors, double-sided bipolar transistors and 3D integrated circuits.