Patents by Inventor Hao-Chun Huang

Hao-Chun Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240128216
    Abstract: A bonding structure that may be used to form 3D-IC devices is formed using first oblong bonding pads on a first substrate and second oblong bonding pads one a second substrate. The first and second oblong bonding pads are laid crosswise, and the bond is formed. Viewed in a first cross-section, the first bonding pad is wider than the second bonding pad. Viewed in a second cross-section at a right angle to the first, the second bonding pad is wider than the first bonding pad. Making the bonding pads oblong and angling them relative to one another reduces variations in bonding area due to shifts in alignment between the first substrate and the second substrate. The oblong shape in a suitable orientation may also be used to reduce capacitive coupling between one of the bonding pads and nearby wires.
    Type: Application
    Filed: January 4, 2023
    Publication date: April 18, 2024
    Inventors: Hao-Lin Yang, Kuan-Chieh Huang, Wei-Cheng Hsu, Tzu-Jui Wang, Ching-Chun Wang, Hsiao-Hui Tseng, Chen-Jong Wang, Dun-Nian Yaung
  • Patent number: 11935871
    Abstract: A semiconductor package including a first semiconductor die, a second semiconductor die, a first insulating encapsulation, a dielectric layer structure, a conductor structure and a second insulating encapsulation is provided. The first semiconductor die includes a first semiconductor substrate and a through silicon via (TSV) extending from a first side to a second side of the semiconductor substrate. The second semiconductor die is disposed on the first side of the semiconductor substrate. The first insulating encapsulation on the second semiconductor die encapsulates the first semiconductor die. A terminal of the TSV is coplanar with a surface of the first insulating encapsulation. The dielectric layer structure covers the first semiconductor die and the first insulating encapsulation. The conductor structure extends through the dielectric layer structure and contacts with the through silicon via.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: March 19, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hao-Yi Tsai, Cheng-Chieh Hsieh, Tsung-Hsien Chiang, Hui-Chun Chiang, Tzu-Sung Huang, Ming-Hung Tseng, Kris Lipu Chuang, Chung-Ming Weng, Tsung-Yuan Yu, Tzuan-Horng Liu
  • Publication number: 20240088307
    Abstract: A semiconductor package is provided. The semiconductor package includes a heat dissipation substrate including a first conductive through-via embedded therein; a sensor die disposed on the heat dissipation substrate; an insulating encapsulant laterally encapsulating the sensor die; a second conductive through-via penetrating through the insulating encapsulant; and a first redistribution structure and a second redistribution structure disposed on opposite sides of the heat dissipation substrate. The second conductive through-via is in contact with the first conductive through-via. The sensor die is located between the second redistribution structure and the heat dissipation substrate. The second redistribution structure has a window allowing a sensing region of the sensor die receiving light. The first redistribution structure is electrically connected to the sensor die through the first conductive through-via, the second conductive through-via and the second redistribution structure.
    Type: Application
    Filed: November 20, 2023
    Publication date: March 14, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hsuan Tai, Hao-Yi Tsai, Yu-Chih Huang, Chih-Hao Chang, Chia-Hung Liu, Ban-Li Wu, Ying-Cheng Tseng, Po-Chun Lin
  • Patent number: 11929318
    Abstract: A package structure includes a thermal dissipation structure, a first encapsulant, a die, a through integrated fan-out via (TIV), a second encapsulant, and a redistribution layer (RDL) structure. The thermal dissipation structure includes a substrate and a first conductive pad disposed over the substrate. The first encapsulant laterally encapsulates the thermal dissipation structure. The die is disposed on the thermal dissipation structure. The TIV lands on the first conductive pad of the thermal dissipation structure and is laterally aside the die. The second encapsulant laterally encapsulates the die and the TIV. The RDL structure is disposed on the die and the second encapsulant.
    Type: Grant
    Filed: May 10, 2021
    Date of Patent: March 12, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hsuan Tai, Hao-Yi Tsai, Tsung-Hsien Chiang, Yu-Chih Huang, Chia-Hung Liu, Ban-Li Wu, Ying-Cheng Tseng, Po-Chun Lin
  • Publication number: 20240079434
    Abstract: Various embodiments of the present disclosure are directed towards an image sensor including first chip and a second chip. The first chip includes a first substrate, a plurality of photodetectors disposed in the first substrate, a first interconnect structure disposed on a front side of the first substrate, and a first bond structure disposed on the first interconnect structure. The second chip underlies the first chip. The second chip includes a second substrate, a plurality of semiconductor devices disposed on the second substrate, a second interconnect structure disposed on a front side of the second substrate, and a second bond structure disposed on the second interconnect structure. A first bonding interface is disposed between the second bond structure and the first bond structure. The second interconnect structure is electrically coupled to the first interconnect structure by way of the first and second bond structures.
    Type: Application
    Filed: January 5, 2023
    Publication date: March 7, 2024
    Inventors: Hao-Lin Yang, Kuan-Chieh Huang, Wei-Cheng Hsu, Tzu-Jui Wang, Chen-Jong Wang, Dun-Nian Yaung, Yu-Chun Chen
  • Publication number: 20240072459
    Abstract: An electrical connection structure including a first substrate, a first conductive pad, a second substrate, a second conductive pad, at least two through holes and a conductive material. The first conductive pad is disposed on the first substrate and includes a first top surface. The second conductive pad is disposed on the second substrate and includes a second top surface. The at least two through holes pass through the first substrate and expose portions of the second top surface. A portion of the conductive material is disposed within the at least two through holes, and the conductive material electrically connects the first conductive pad and the second conductive pad.
    Type: Application
    Filed: July 27, 2023
    Publication date: February 29, 2024
    Applicant: InnoLux Corporation
    Inventors: Chia-Chun LIU, Hao-Jung HUANG
  • Patent number: 11477900
    Abstract: A locking assembly for a Kensington-locked enclosure can be simply padlocked for security. The locking assembly includes a first connecting member and a second connecting member. The first connecting member is fixed on a base body of the enclosure, the first connecting member comprises a first tongue piece. The second connecting member is fixed on an upper cover of the enclosure, and the second connecting member comprises a second tongue piece. The first tongue piece and the second tongue piece protrude from an outside of the enclosure and fit each other, and a padlock can pass through the first tongue piece and the second tongue piece to lock the base body and the upper cover together and secure the attachment of the Kensington lock.
    Type: Grant
    Filed: June 22, 2020
    Date of Patent: October 18, 2022
    Assignee: HONG FU JIN PRECISION INDUSTRY (WuHan) CO., LTD.
    Inventors: Tzu-Wei Lai, Hao-Chun Huang, Wen-Hsiang Hung, Jun-Bo Yang
  • Publication number: 20210207406
    Abstract: A locking assembly for a Kensington-locked enclosure can be simply padlocked for security. The locking assembly includes a first connecting member and a second connecting member. The first connecting member is fixed on a base body of the enclosure, the first connecting member comprises a first tongue piece. The second connecting member is fixed on an upper cover of the enclosure, and the second connecting member comprises a second tongue piece. The first tongue piece and the second tongue piece protrude from an outside of the enclosure and fit each other, and a padlock can pass through the first tongue piece and the second tongue piece to lock the base body and the upper cover together and secure the attachment of the Kensington lock.
    Type: Application
    Filed: June 22, 2020
    Publication date: July 8, 2021
    Inventors: TZU-WEI LAI, HAO-CHUN HUANG, WEN-HSIANG HUNG, JUN-BO YANG
  • Patent number: 10224879
    Abstract: A peak detector utilizes two choppers to cancel offset voltage of a transconductance amplifier, so the influence of the offset voltage is preventable and the peak detection accuracy of the peak detector can be improved significantly.
    Type: Grant
    Filed: December 26, 2017
    Date of Patent: March 5, 2019
    Assignee: NATIONAL SUN YAT-SEN UNIVERSITY
    Inventors: Chua-Chin Wang, Deng-Shian Wang, Hao-Chun Huang
  • Patent number: D851272
    Type: Grant
    Filed: November 17, 2017
    Date of Patent: June 11, 2019
    Assignee: ZYLLION, INC.
    Inventor: Hao-Chun Huang
  • Patent number: D919107
    Type: Grant
    Filed: November 17, 2017
    Date of Patent: May 11, 2021
    Assignee: ZYLLION, INC.
    Inventor: Hao-Chun Huang
  • Patent number: D963180
    Type: Grant
    Filed: April 7, 2021
    Date of Patent: September 6, 2022
    Assignee: ZYLLION, INC.
    Inventor: Hao-Chun Huang
  • Patent number: D971427
    Type: Grant
    Filed: January 20, 2021
    Date of Patent: November 29, 2022
    Assignee: ZYLLION, INC.
    Inventor: Hao-Chun Huang
  • Patent number: D979780
    Type: Grant
    Filed: August 3, 2022
    Date of Patent: February 28, 2023
    Assignee: ZYLLION, INC.
    Inventor: Hao-Chun Huang