Abstract: Disclosed are a visualization grouting device for coal and rock fissures and a test method, a test device including a visualization fissure grouting box body, a box body bracket, a grouting device and a monitoring device. A bottom plate is divided into four identical areas, rubber cushion blocks with different specifications are arranged to simulate different fissure widths and tortuosity, artificial protolith thin film is pasted inside, and a grouting hole and a plurality of pressure measuring holes are arranged in the center of the upper top plate. In the present disclosure, the grouting process of fissures under different grouting conditions, such as different fissure widths, roughness, grouting resistance and tortuosity of pore channels can be simulated, the grouting under different fissure conditions can be simultaneously simulated, and the differences of different grouting diffusion forms can be clearly and intuitively analyzed and compared through the visualization box body.

Abstract: The embodiments of the disclosure provide a method for managing data drop rate, a client device, and a computer readable storage medium. The method includes: determining, by the client device, a first data component corresponding to a t-th time point and a second data component, wherein the first data component belongs to a first data type, and the second data component belongs to the first data type or a second data type; sending, by the client device, a first data packet to a host at the t-th time point, wherein the first data packet comprises a first payload having a fixed size, and the first payload comprises the first data component and the second data component.

Abstract: The present disclosure provides a receiver circuit and a receiver circuit control method. In the present disclosure, the input data is detected by a detection circuit to obtain a data rate detection result, and the bandwidth of the receiver is automatically adjusted according to the data rate detection result.

Abstract: A sealing structure includes a box body and a cover body. The box body includes a plurality of side walls respectively including a plurality of outer and inner portions, an annular groove formed on the inner portions, and an annular protrusion portion. Each outer portion has a level difference with the corresponding inner portion. Any two adjacent ones of the side walls form a corner portion. An outer surface of each corner portion forms a sharp corner. The annular groove is arc-shaped at a position corresponding to each corner portion. Each corner portion includes a hollowed-out area. The cover body includes a main body in a polygonal shape with sharp corners, an annular protrusion portion protruding from the main body, and an annular groove. The annular protrusion portions extend into the annular grooves, so that the cover body is sealedly joined to the box body.

Abstract: A semiconductor device that includes an n-buried layer, a p-well region over the n-buried layer, an n-channel MOSFET that includes an n-drain region, and a vertical NPN BJT having a collector that is the n-drain region and a base that is the p-well region. The p-well region is floating.

Abstract: The invention relates to aqueous composition comprising water-soluble glycerin-based polyalkylene glycols as synthetic base oils as well as the use of the composition and the glycerin-based polyalkylene glycols as or in metalworking fluids, wherein the glycerin was consecutively alkoxylated in the following order: first with propylene oxide, followed by ethylene oxide and finally with propylene oxide.

Abstract: An ESD power clamp device includes an ESD detection circuit; a controlling circuit coupled with the ESD detection circuit; a field effect transistor (FET) coupled with the controlling circuit, and an impedance element coupled with the FET. The FET includes a drain terminal coupled with a first supply node; a gate terminal coupled with the controlling circuit; a source terminal coupled with a second supply node via the impedance element; and a bulk terminal coupled with second supply node.

Abstract: The voltage regulator comprises: a voltage regulation circuit, a detection circuit and at least one current source unit. An output terminal of the voltage regulation circuit is electrically connected to a first terminal of each of the current source units, and is configured to be electrically connected to a load; and a second terminal of each of the current source units is electrically connected to a first voltage terminal. The detection circuit is electrically connected to the voltage regulation circuit, and is configured to: when the voltage regulation circuit is in a light-load state, control a designed number of the current source units to connect to the output terminal of the voltage regulation circuit to output designed current, and when the voltage regulation circuit is in a heavy-load state, control each of the current source units to disconnect from the output terminal of the voltage regulation circuit.

Abstract: The invention relates to aqueous composition comprising water-soluble glycerin-based polyalkylene glycols as synthetic base oils as well as the use of the composition and the glycerin-based polyalkylene glycols as or in metalworking fluids, wherein the glycerin was consecutively alkoxylated in the following order: first with propylene oxide, followed by ethylene oxide and finally with propylene oxide.

Abstract: The present disclosure provides a receiver circuit and a receiver circuit control method. In the present disclosure, the input data is detected by a detection circuit to obtain a data rate detection result, and the bandwidth of the receiver is automatically adjusted according to the data rate detection result.

Abstract: An ESD power clamp device includes an ESD detection circuit; a controlling circuit coupled with the ESD detection circuit; a field effect transistor (FET) coupled with the controlling circuit, and an impedance element coupled with the FET. The FET includes a drain terminal coupled with a first supply node; a gate terminal coupled with the controlling circuit; a source terminal coupled with a second supply node via the impedance element; and a bulk terminal coupled with second supply node.

Abstract: An electronic device is provided in the present disclosure. The electronic device has an imaging region and an auxiliary display region connected with the imaging region. The electronic device includes a main display screen and an auxiliary display screen disposed opposite to the main display screen, and the auxiliary display screen is disposed corresponding to the auxiliary display region.

Abstract: An ESD power clamp device includes an ESD detection circuit; a controlling circuit coupled with the ESD detection circuit; a field effect transistor (FET) coupled with the controlling circuit, and an impedance element coupled with the FET. The FET includes a drain terminal coupled with a first supply node; a gate terminal coupled with the controlling circuit; a source terminal coupled with a second supply node via the impedance element; and a bulk terminal coupled with second supply node.

Abstract: The disclosure relates to a modular high-power off-board charger. The charger includes an AC module, a DC module, a rectifier module and a wire harness module. The AC module is provided with an AC module connector, the DC module is provided with a DC module connector, the rectifier module is provided with a rectifier module connector, and the wire harness module is provided with an AC wire harness connector docked with the AC module connector, a DC wire harness connector docked with the DC module connector, and a rectifier wire harness connector docked with the rectifier module connector. The AC wire harness connector, the DC wire harness connector and the rectifier wire harness connector are electrically connected in the wire harness module.

Abstract: An ESD power clamp device includes an ESD detection circuit; a controlling circuit coupled with the ESD detection circuit; a field effect transistor (FET) coupled with the controlling circuit, and an impedance element coupled with the FET. The FET includes a drain terminal coupled with a first supply node; a gate terminal coupled with the controlling circuit; a source terminal coupled with a second supply node via the impedance element; and a bulk terminal coupled with second supply node.

Abstract: Apparatus and method for digital signal constellation transformation are provided herein. In certain configurations, an integrated circuit includes an analog front-end that converts an analog signal vector representing an optical signal into a digital signal vector, and a digital signal processing circuit that processes the digital signal vector to recover data from the optical signal. The digital signal processing circuit generates signal data representing a signal constellation of the digital signal vector. The digital signal processing circuit includes an adaptive gain equalizer that compensates the signal data for distortion of the signal constellation arising from biasing errors of optical modulators used to transmit the optical signal.

Abstract: Provided herein are compounds that are useful for or methods of inhibiting ?-catenin or disrupting the interaction between ?-catenin and T-cell factor 4, which are useful in the treatment of diseases or health conditions, such as cancer, neurodegenerative, a metabolic disease, a cardiovascular disease, fibrosis, and a bone disease. In one aspect, the compounds have Formula 1 wherein R1 is —(CR42)mXR5; R2 is alkyl, alkenyl, alkynyl, cycloalkyl, cycloalkenyl, heterocycloalkyl, heterocycloalkenyl, aryl, aralkyl, heteroaralkyl, or heteroaryl; and R3 is —(CR62)nR7.

Abstract: The present invention relates to an edge-computing-oriented construction method for a container image, and the construction method for a container image at least comprising steps of: having an image reconstruction module reconstruct an old container image so as to obtain a new container image comprising an index and a set of spare files that correspond to each other, and having an image management module store the index and the spare files separately from each other in an image repository and a spare file storage module respectively; having a download engine module scrape the index from the image repository to a corresponding container in the edge end, so that a container instance service module conducts search in a local file sharing module according to configuration information contained in the index and thereby retrieves a local shared file corresponding to the configuration information, an image file consulting module is configured to download a default file from the spare file storage module that does no

Abstract: The present invention relates to an edge-computing-oriented construction method for a container image, and the construction method for a container image at least comprising steps of: having an image reconstruction module reconstruct an old container image so as to obtain a new container image comprising an index and a set of spare files that correspond to each other, and having an image management module store the index and the spare files separately from each other in an image repository and a spare file storage module respectively; having a download engine module scrape the index from the image repository to a corresponding container in the edge end, so that a container instance service module conducts search in a local file sharing module according to configuration information contained in the index and thereby retrieves a local shared file corresponding to the configuration information, an image file consulting module is configured to download a default file from the spare file storage module that does no

Abstract: Apparatus and method for digital signal constellation transformation are provided herein. In certain configurations, an integrated circuit includes an analog front-end that converts an analog signal vector representing an optical signal into a digital signal vector, and a digital signal processing circuit that processes the digital signal vector to recover data from the optical signal. The digital signal processing circuit generates signal data representing a signal constellation of the digital signal vector. The digital signal processing circuit includes an adaptive gain equalizer that compensates the signal data for distortion of the signal constellation arising from biasing errors of optical modulators used to transmit the optical signal.