Abstract: Techniques to incorporate quality of experience (QoE) in mobility management are disclosed. A user equipment (UE) may provide a QoE report to network (e.g., cell) upon detection of a QoE report triggering event (e.g., mobility management, environmental trigger, etc.). The QoE report may comprise information related to QoE metrics such as uplink (UL) latency, UL throughput, UL error rate, downlink (DL) frequency, DL throughput, DL error rate, handover (HO) frequency, beam switch frequency, UE power consumption, etc. The network may take actions such as sending a mobility management command if it is decided that QoE should be restored to the UE.

Abstract: The present invention provides a micro biosensor for reducing a measurement interference when measuring a target analyte in the biofluid, including: a substrate; a first working electrode configured on the surface, and including a first sensing section; a second working electrode configured on the surface, and including a second sensing section which is configured adjacent to at least one side of the first sensing section; and a chemical reagent covered on at least a portion of the first sensing section for reacting with the target analyte to produce a resultant. When the first working electrode is driven by a first working voltage, the first sensing section measures a physiological signal with respect to the target analyte. When the second working electrode is driven by a second working voltage, the second conductive material can directly consume the interferant so as to continuously reduce the measurement inference of the physiological signal.

Abstract: A transaminase mutant and use hereof, the amino acid sequence of the transaminase mutant is an amino acid sequence in which the amino acid sequence as represented by SEQ ID NO: 1 is mutated, the mutated amino acid position being one or more selected from among F89, K193, P243, V234, I262, Q280, V379, R416, A417 and C418. The enzymatic activity and/or stability of the transaminase mutant is improved.

Abstract: A calibration apparatus includes a processor, an alignment device, and an arm. The alignment device captures images in a three-dimensional space, and a tool is arranged on a flange of the arm. The processor records a first matrix of transformation between an end-effector coordinate-system and a robot coordinate-system, and performs a tool calibration procedure according to the images captured by the alignment device for obtaining a second matrix of transformation between a tool coordinate-system and the end-effector coordinate-system. The processor calculates relative position of a tool center point of the tool in the robot coordinate-system based on the first and second matrixes, and controls the TCP to move in the three-dimensional space for performing a positioning procedure so as to regard points in an alignment device coordinate-system as points of the TCP, and calculates the relative positions of points in the alignment device coordinate-system and in the robot coordinate-system.

Abstract: A fixing mechanism is applied to an interface card assembly and an electronic apparatus. The fixing mechanism includes a movable window and an operation component. The movable window is slidably disposed on a casing of the interface card assembly. The operation component has a fixed end and a free end opposite to each other. The fixed end is disposed on the movable window. The free end is detachably engaged with the casing to position the movable window. The movable window is positioned on one of a first region and a second region of the casing for respectively fixing interface cards with different sizes to the casing.

Abstract: Geologic modeling methods and systems may use design-space to design-space mapping to facilitate simulation grid generation for multiple interpretations of a subsurface region. As one example, one or more embodiments of a geologic modeling method may comprise: obtaining first and second geologic models having different structural interpretations of a subsurface region; mapping each of the geologic models to associated design space models representing an unfaulted subsurface region; determining a design-to-design space mapping from the first design space model to the second design space model; using said mapping to copy parameter values from the first design space model to the second of the design space model; gridding each of the design space models to obtain design space meshes; partitioning cells in the first and second design space meshes along faults; reverse mapping the partitioned design space meshes to the physical space to obtain first and second physical space simulation meshes.

Abstract: A driver circuit may include a source, a first circuit path, and a second circuit path. The a first circuit path may be connected to the source and include a first anode pad, a first set of connecting elements to connect the first anode pad to an anode of an optical load, a second anode pad that is separate from the first anode pad, a second set of connecting elements to connect the anode of the optical load to the second anode pad, and a switch. The switch being in a closed state causes current to charge the first set of connecting elements and the second set of connecting elements through the first circuit path. The switch transitioning from the closed state to the open state causes the first set of connecting elements to discharge current through the second circuit path to provide an electrical pulse to the optical load.

Abstract: Semiconductor devices and methods of forming the same are provided. A semiconductor device according to one embodiment includes an active region including a channel region and a source/drain region adjacent the channel region, a gate structure over the channel region of the active region, a source/drain contact over the source/drain region, a dielectric feature over the gate structure and including a lower portion adjacent the gate structure and an upper portion away from the gate structure, and an air gap disposed between the gate structure and the source/drain contact. A first width of the upper portion of the dielectric feature along a first direction is greater than a second width of the lower portion of the dielectric feature along the first direction. The air gap is disposed below the upper portion of the dielectric feature.

Abstract: Glasses with gesture recognition function include a glasses frame and a gesture recognition system. The gesture recognition system is disposed on the glasses frame and configured to detect hand gestures in front of the glasses thereby generating a control command. The gesture recognition system transmits the control command to an electronic device to correspondingly control the electronic device.

Abstract: A semiconductor device structure includes a source/drain feature comprising a first surface, a second surface opposing the first surface, and a sidewall connecting the first surface to the second surface. The structure also includes a dielectric layer having a continuous surface in contact with the entire second surface of the source/drain feature, a semiconductor layer having a first surface, a second surface opposing the first surface, and a sidewall connecting the first surface to the second surface, wherein the sidewall of the semiconductor layer is in contact with the sidewall of the source/drain feature. The structure also includes a gate dielectric layer in contact with the continuous surface of the dielectric layer and the second surface of the semiconductor layer, and a gate electrode layer surrounding a portion of the semiconductor layer.

Abstract: An electromagnetic interference (EMI) shielding package structure, a manufacturing method thereof, and an electronic assembly are provided. The EMI shielding package structure includes a carrier, at least one chip mounted on a first board surface of the carrier, an encapsulant formed on the carrier and packaging the at least one chip, an EMI shielding layer formed on an outer surface of the encapsulant, and an insulating layer. The insulating layer includes a spraying portion and a capillary permeating portion. The spraying portion is formed at least part of an outer surface of the EMI shielding layer. The capillary permeating portion is formed by extending from a bottom end of the spraying portion toward a second board surface of the carrier through capillarity, and the capillary permeating portion covers a bottom edge of the EMI shielding layer.

Abstract: An integrated circuit package including integrated circuit dies with slanted sidewalls and a method of forming are provided. The integrated circuit package may include a first integrated circuit die, a first gap-fill dielectric layer around the first integrated circuit die, a second integrated circuit die underneath the first integrated circuit die, and a second gap-fill dielectric layer around the second integrated circuit die. The first integrated circuit die may include a first substrate, wherein a first angle is between a first sidewall of the first substrate and a bottom surface of the first substrate, and a first interconnect structure on the bottom surface of the first substrate, wherein a second angle is between a first sidewall of the first interconnect structure and the bottom surface of the first substrate. The first angle may be larger than the second angle.

Abstract: A method of manufacturing a semiconductor structure forming a first diffusion layer on a first electrode layer and forming a core layer over the first diffusion layer. A second diffusion layer is formed over the core layer. A plurality of diffusion regions are formed in the second diffusion layer. A second electrode layer is formed over the second diffusion layer and in contact with the plurality of diffusion regions. The second diffusion layer is coupled to the plurality of diffusion regions through the second electrode layer. The substrate is sandwiched between the first electrode layer and the second electrode layer.

Abstract: Various embodiments of the present disclosure are directed towards an imaging device including a first image sensor element and a second image sensor element respectively comprising a pixel unit disposed within a semiconductor substrate. The first image sensor element is adjacent to the second image sensor element. A first micro-lens overlies the first image sensor element and is laterally shifted from a center of the pixel unit of the first image sensor element by a first lens shift amount. A second micro-lens overlies the second image sensor element and is laterally shifted from a center of the pixel unit of the second image sensor element by a second lens shift amount different from the first lens shift amount.

Abstract: A projection device including a casing, a light source module, an optical engine module and a projection lens is provided. A front cover, a rear cover, a first side cover, a second side cover, an upper cover and a lower cover of the casing surround an accommodating space. The light source module includes a first and a second light sources, and a first and a second light source heat dissipation modules. The lower cover has a first, a second and a third air inlets. The first and the second side covers respectively have a first and a second air outlets. The first and the second light source heat dissipation modules are correspondingly disposed above the first air inlet and correspond to the first air outlet. The second and the third air inlets are respectively disposed below two sides of the projection lens and adjacent to the front cover.

Abstract: A Totem Pole PFC circuit includes at least one fast-switching leg, a slow-switching leg, and a control unit. Each fast-switching leg includes a fast-switching upper switch and a fast-switching lower switch. The slow-switching leg is coupled in parallel to the at least one fast-switching leg, and the slow-switching leg includes a slow-switching upper switch and a slow-switching lower switch. The control unit receives an AC voltage with a phase angle, and the control unit includes a current detection loop, a voltage detection loop, and a control loop. The control loop generates a second control signal assembly to respectively control the slow-switching upper switch and the slow-switching lower switch. The control loop controls the second control signal assembly to follow the phase angle, and dynamically adjusts a duty cycle of the second control signal assembly to turn on or turn off the slow-switching upper switch and the slow-switching lower switch.

Abstract: Semiconductor structures and methods for forming the same are provided. The semiconductor structure includes a plurality of first nanostructures formed over a substrate, and a dielectric wall adjacent to the first nanostructures. The semiconductor structure also includes a first liner layer between the first nanostructures and the dielectric wall, and the first liner layer is in direct contact with the dielectric wall. The semiconductor structure also includes a gate structure surrounding the first nanostructures, and the first liner layer is in direct contact with a portion of the gate structure.

Abstract: Methods, systems, and devices for connection setup in an orbital angular momentum (OAM)-based communication system are described. A first device and a second device may establish an OAM communications connection between the devices. The first device and the second device may exchange a series of messages over a downlink communications link and an uplink communications link according to an OAM mode. Based on OAM related parameters or OAM related information included in the messages, the first device and the second device may achieve a successful directional alignment (co-axial alignment) between the first device and the second device. The first device and the second device may determine one or more orbital angular momentum modes for communication between the first device and the second device based on the establishing the directional alignment.

Abstract: An image quality improvement method and an image processing apparatus using the same are provided. Denoising filtering is performed to an original image by a filter to obtain a preliminary processing image. The preliminary processing image is input to a multi-stage convolutional network model to generate an optimization image through the multi-stage convolutional network model. The multi-stage convolutional network model includes multiple convolutional network sub-models, and these convolutional network sub-models respectively correspond to different network architectures.

Abstract: A method of fabricating a device includes providing a fin element in a device region and forming a dummy gate over the fin element. In some embodiments, the method further includes forming a source/drain feature within a source/drain region adjacent to the dummy gate. In some cases, the source/drain feature includes a bottom region and a top region contacting the bottom region at an interface interposing the top and bottom regions. In some embodiments, the method further includes performing a plurality of dopant implants into the source/drain feature. In some examples, the plurality of dopant implants includes implantation of a first dopant within the bottom region and implantation of a second dopant within the top region. In some embodiments, the first dopant has a first graded doping profile within the bottom region, and the second dopant has a second graded doping profile within the top region.