Patents by Inventor Hao-Jan Pei

Hao-Jan Pei has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12388060
    Abstract: A method includes forming a composite material layer over a carrier, the composite material layer including particles of a filler material incorporated into a base material, forming a set of through vias over a first side of the composite material layer, attaching a die over the first side of the composite material layer, the die being spaced apart from the set of through vias, forming a molding material over the first side of the composite material layer, the molding material least laterally encapsulating the die and the through vias of the set of through vias, forming a redistribution structure over the die and the molding material, the redistribution structure electrically connected to the through vias, forming openings in a second side of the composite material layer opposite the first side, and forming conductive connectors in the openings, the conductive connectors electrically connected to the through vias.
    Type: Grant
    Filed: April 18, 2022
    Date of Patent: August 12, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Hua Yu, Kuo-Lung Pan, Ting-Hao Kuo, Hao-Yi Tsai, Hsiu-Jen Lin, Hao-Jan Pei, Ching-Hua Hsieh
  • Patent number: 12368053
    Abstract: A method includes forming an insulating layer over a package. The package has a plurality of locations where openings are subsequently formed. A first laser shot is performed, location by location, on each of the locations across the package. A first laser spot of the first laser shot overlaps with each of the locations. The first laser shot removes a first portion of the insulating layer below the first laser spot. Another laser shot is performed, location by location, on each of the locations across the package. Another laser spot of the another laser shot overlaps with each of the locations. The another laser shot removes another portion of the insulating layer below the another laser spot. Performing the another laser shot, location by location, on each of the locations across the package is repeated multiple times, until desired portions of the insulating layer are removed.
    Type: Grant
    Filed: May 4, 2022
    Date of Patent: July 22, 2025
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chia-Shen Cheng, Chia-Lun Chang, Hao-Jan Pei, Hsiu-Jen Lin, Ching-Hua Hsieh
  • Publication number: 20250201621
    Abstract: A workpiece holder includes a chuck body and a seal ring. The chuck body includes a receiving surface configured to receive a workpiece and at least one vacuum port configured to apply a vacuum seal. The seal ring surrounds a side surface of the chuck body. A top surface of the seal ring is higher than the receiving surface of the chuck body, and the workpiece leans against the seal ring when the vacuum seal is applied between the workpiece and the chuck body.
    Type: Application
    Filed: March 2, 2025
    Publication date: June 19, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Shiuan Wong, Chih-Chiang Tsao, Chao-Wei Chiu, Hao-Jan Pei, Wei-Yu Chen, Hsiu-Jen Lin, Ching-Hua Hsieh, Chia-Shen Cheng
  • Publication number: 20250192011
    Abstract: A semiconductor package includes a package substrate, an integrated interconnect structure, an optical engine module, and an integrated circuit package. The integrated interconnect structure is bonded over the package substrate and includes an insulation body, a plurality of through vias extending through the insulation body. The optical engine module includes an electronic die, a photonic die, and a waveguide. A portion of the optical engine module is embedded in the integrated interconnect structure. The integrated circuit package is bonded over the integrated interconnect structure and electrically coupled to the optical engine module.
    Type: Application
    Filed: December 7, 2023
    Publication date: June 12, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chao-Wei Chiu, Ching-Hua Hsieh, Hsiu-Jen Lin, Hao-Jan Pei, Chia-Shen Cheng, Hsuan-Ting Kuo
  • Publication number: 20250149488
    Abstract: In an embodiment, a method includes forming a device region along a first substrate; forming an interconnect structure over the device region and the first substrate; forming a metal pillar over the interconnect structure, forming the metal pillar comprising: forming a base layer over the interconnect structure; forming an intermediate layer over the base layer; and forming a capping layer over the intermediate layer; forming a solder region over the capping layer; and performing an etch process to recess sidewalls of the base layer and the capping layer from sidewalls of the intermediate layer and the solder region.
    Type: Application
    Filed: February 23, 2024
    Publication date: May 8, 2025
    Inventors: Wei-Yu Chen, Chao-Wei Chiu, Hsin Liang Chen, Hao-Jan Shih, Hao-Jan Pei, Hsiu-Jen Lin
  • Publication number: 20250118716
    Abstract: A semiconductor package includes a semiconductor element, at least one electronic die, at least one optical die, an encapsulant, and a substrate. The semiconductor element has a first side and a second side opposing to the first side. The at least one electronic die is disposed over the first side. The at least one optical die is disposed over the first side and next to the at least one electronic die. The encapsulant is disposed on the first side and covers the at least one electronic die, where a sidewall of the at least one optical die is distant from the encapsulant, and a sidewall of the encapsulant is aligned with a sidewall of the semiconductor element. The substrate is disposed over the second side, where the at least one electronic die is electrically coupled to the substrate and the at least one optical die through the semiconductor element.
    Type: Application
    Filed: October 10, 2023
    Publication date: April 10, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei-Yu Chen, Cheng-Shiuan Wong, Chia-Shen Cheng, Hsuan-Ting Kuo, Hao-Jan Pei, Hsiu-Jen Lin
  • Patent number: 12266559
    Abstract: A method of handling a workpiece includes the following steps. A workpiece is placed on a chuck body, wherein the workpiece includes a tape carrier extending beyond a periphery of the chuck body and a workpiece body disposed on the tape carrier, and the chuck body includes a seal ring surrounding the periphery of the chuck body; the tape carrier is clamped outside the chuck body, wherein the tape carrier leans against the seal ring and an enclosed space is formed between the chuck body, the tape carrier and the seal ring; and a vacuum seal is formed by evacuating gas from the enclosed space to pull the periphery of the workpiece toward the chuck body.
    Type: Grant
    Filed: July 26, 2023
    Date of Patent: April 1, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Shiuan Wong, Chih-Chiang Tsao, Chao-Wei Chiu, Hao-Jan Pei, Wei-Yu Chen, Hsiu-Jen Lin, Ching-Hua Hsieh, Chia-Shen Cheng
  • Patent number: 12261088
    Abstract: A package structure includes a die, an encapsulation layer, a redistribution layer structure and an adhesive material. The die includes a semiconductor substrate, conductive pads disposed over the semiconductor substrate and a passivation layer disposed over the semiconductor substrate and around the conductive pads. The encapsulation layer laterally encapsulates the die. the redistribution layer structure is disposed on the die and the encapsulation layer, and includes at least one redistribution layer embedded in at least one polymer layer, and the polymer layer contacts a portion of the passivation layer. The adhesive material is disposed on the die and covers an interface between the polymer layer and the passivation layer.
    Type: Grant
    Filed: August 31, 2021
    Date of Patent: March 25, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jen-Jui Yu, Hao-Jan Pei, Cheng-Ting Chen, Chih-Chiang Tsao, Hsiu-Jen Lin, Ching-Hua Hsieh
  • Publication number: 20250087652
    Abstract: A semiconductor package includes an interposer that has a first side and a second side opposing the first side. A semiconductor device that is on the first side of the interposer and an optical device that is on the first side of the interposer and next to the semiconductor device. A first encapsulant layer includes a first portion and a second portion. The first portion of the first encapsulant layer is on the first side of the interposer and along sidewalls of the semiconductor device. A gap is between a first sidewall of the optical device and a second sidewall of the first portion of the first encapsulant layer. A substrate is over the second side of the interposer. The semiconductor device and the optical device are electrically coupled to the substrate through the interposer.
    Type: Application
    Filed: January 5, 2024
    Publication date: March 13, 2025
    Inventors: Wei-Yu Chen, Cheng-Shiuan Wong, Chia-Shen Cheng, Hsuan-Ting Kuo, Hao-Jan Pei, Hsiu-Jen Lin, Mao-Yen Chang
  • Publication number: 20250070077
    Abstract: A system for reflowing a semiconductor workpiece including a stage, a first vacuum module and a second vacuum module, and an energy source is provided. The stage includes a base and a protrusion connected to the base, the stage is movable along a height direction of the stage relative to the semiconductor workpiece, the protrusion operably holds and heats the semiconductor workpiece, and the protrusion includes a first portion and a second portion surrounded by and spatially separated from the first portion. The first vacuum module and the second vacuum module respectively coupled to the first portion and the second portion of the protrusion, and the first vacuum module and the second vacuum module are operable to respectively apply a pressure to the first portion and the second portion. The energy source is disposed over the stage to heat the semiconductor workpiece held by the protrusion of the stage.
    Type: Application
    Filed: November 7, 2024
    Publication date: February 27, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Shiuan Wong, Ching-Hua Hsieh, Hsiu-Jen Lin, Hao-Jan Pei, Hsuan-Ting Kuo, Wei-Yu Chen, Chia-Shen Cheng, Philip Yu-Shuan Chung
  • Patent number: 12230597
    Abstract: A package structure is provided. The package structure includes a semiconductor chip and a protective layer laterally surrounding the semiconductor chip. The package structure also includes a polymer-containing element over the protective layer. The protective layer is wider than the polymer-containing element.
    Type: Grant
    Filed: June 16, 2023
    Date of Patent: February 18, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hao-Jan Pei, Chih-Chiang Tsao, Wei-Yu Chen, Hsiu-Jen Lin, Ming-Da Cheng, Ching-Hua Hsieh, Chung-Shi Liu
  • Patent number: 12176319
    Abstract: A system for reflowing a semiconductor workpiece including a stage, a first vacuum module and a second vacuum module, and an energy source is provided. The stage includes a base and a protrusion connected to the base, the stage is movable along a height direction of the stage relative to the semiconductor workpiece, the protrusion operably holds and heats the semiconductor workpiece, and the protrusion includes a first portion and a second portion surrounded by and spatially separated from the first portion. The first vacuum module and the second vacuum module respectively coupled to the first portion and the second portion of the protrusion, and the first vacuum module and the second vacuum module are operable to respectively apply a pressure to the first portion and the second portion. The energy source is disposed over the stage to heat the semiconductor workpiece held by the protrusion of the stage.
    Type: Grant
    Filed: February 22, 2023
    Date of Patent: December 24, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Shiuan Wong, Ching-Hua Hsieh, Hsiu-Jen Lin, Hao-Jan Pei, Hsuan-Ting Kuo, Wei-Yu Chen, Chia-Shen Cheng, Philip Yu-Shuan Chung
  • Publication number: 20240371813
    Abstract: A semiconductor package includes a substrate, a semiconductor device over the substrate and a plurality of solder joint structures bonded between the semiconductor device and the substrate, wherein each of the plurality of solder joint structures includes, by weight percent, 2% to 23% of Indium (In).
    Type: Application
    Filed: July 15, 2024
    Publication date: November 7, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jen-Jui Yu, Chih-Chiang Tsao, Hsuan-Ting Kuo, Mao-Yen Chang, Hsiu-Jen Lin, Ching-Hua Hsieh, Hao-Jan Pei
  • Publication number: 20240339424
    Abstract: Embodiments provide a device structure and method of forming a device structure including an infill structure to capture solder materials within confines of openings of the infill structure. Metal pillars of one device can penetrate through a non-conductive film and contact solder regions of another device. A separate underfill is not needed.
    Type: Application
    Filed: August 7, 2023
    Publication date: October 10, 2024
    Inventors: Wei-Yu Chen, Chao-Wei Chiu, Hsin Liang Chen, Hao-Jan Pei, Hsiu-Jen Lin, Ching-Hua Hsieh
  • Patent number: 12107064
    Abstract: A semiconductor package includes a substrate, a semiconductor device over the substrate and a plurality of solder joint structures bonded between the semiconductor device and the substrate, wherein each of the plurality of solder joint structures includes, by weight percent, 2% to 23% of Indium (In).
    Type: Grant
    Filed: April 13, 2022
    Date of Patent: October 1, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jen-Jui Yu, Chih-Chiang Tsao, Hsuan-Ting Kuo, Mao-Yen Chang, Hsiu-Jen Lin, Ching-Hua Hsieh, Hao-Jan Pei
  • Publication number: 20240312941
    Abstract: An electronic apparatus including a package substrate and a structure disposed on and electrically connected to the package substrate through conductive bumps is provided. The material of the conductive bumps includes a bismuth (Bi) containing alloy or an indium (In) containing alloy. In some embodiments, the bismuth (Bi) containing alloy includes Sn—Ag—Cu—Bi alloy. In some embodiments, a concentration of bismuth (Bi) contained in the Sn—Ag—Cu—Bi alloy ranges from about 1 wt % to about 10 wt %. Methods for forming the Sn—Ag—Cu—Bi alloy are also provided.
    Type: Application
    Filed: March 13, 2023
    Publication date: September 19, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chao-Wei Chiu, Wei-Yu Chen, Chih-Chiang Tsao, Hao-Jan Pei, Hsiu-Jen Lin, Ching-Hua Hsieh
  • Publication number: 20240274589
    Abstract: A manufacturing method of a package-on-package structure includes placing a lower package on a tape, where conductive bumps of the lower package are in contact with the tape; and bonding an upper package to the lower package, where during the bonding, the conductive bumps are pressed against the tape so that a curvature of the respective conductive bump changes.
    Type: Application
    Filed: April 22, 2024
    Publication date: August 15, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsuan-Ting Kuo, Ching-Hua Hsieh, Cheng-Ting Chen, Hsiu-Jen Lin, Hao-Jan Pei, Yu-Peng Tsai, Chia-Lun Chang, Chih-Chiang Tsao, Philip Yu-shuan Chung
  • Publication number: 20240266316
    Abstract: An embodiment is a device including a substrate comprising conductive pads, a package component bonded to the conductive pads of the substrate with solder connectors, the package component comprising an integrated circuit die, the integrated circuit die comprising die connectors, one of the solder connectors coupled to each of the die connectors and a corresponding conductive pad of the substrate, a first dielectric layer laterally surrounding each of the die connectors and a portion of the solder connectors, and a second dielectric layer being between the first dielectric layer and the substrate, the second dielectric layer laterally surrounding each of the conductive pads of the substrate.
    Type: Application
    Filed: June 5, 2023
    Publication date: August 8, 2024
    Inventors: Wei-Yu Chen, Ching-Hua Hsieh, Hsiu-Jen Lin, Hao-Jan Pei, Chao-Wei Chiu, Hsin Liang Chen
  • Patent number: 12040309
    Abstract: A method includes performing a first laser shot on a first portion of a top surface of a first package component. The first package component is over a second package component, and a first solder region between the first package component and the second package component is reflowed by the first laser shot. After the first laser shot, a second laser shot is performed on a second portion of the top surface of the first package component. A second solder region between the first package component and the second package component is reflowed by the second laser shot.
    Type: Grant
    Filed: July 28, 2022
    Date of Patent: July 16, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wei-Yu Chen, Chia-Shen Cheng, Hao-Jan Pei, Philip Yu-Shuan Chung, Kuei-Wei Huang, Yu-Peng Tsai, Hsiu-Jen Lin, Ching-Hua Hsieh, Chen-Hua Yu, Chung-Shi Liu
  • Publication number: 20240234365
    Abstract: A method includes performing a first laser shot on a first portion of a top surface of a first package component. The first package component is over a second package component, and a first solder region between the first package component and the second package component is reflowed by the first laser shot. After the first laser shot, a second laser shot is performed on a second portion of the top surface of the first package component. A second solder region between the first package component and the second package component is reflowed by the second laser shot.
    Type: Application
    Filed: March 22, 2024
    Publication date: July 11, 2024
    Inventors: Wei-Yu Chen, Chia-Shen Cheng, Hao-Jan Pei, Philip Yu-Shuan Chung, Kuei-Wei Huang, Yu-Peng Tsai, Hsiu-Jen Lin, Ching-Hua Hsieh, Chen-Hua Yu, Chung-Shi Liu