Abstract: Fuel composition for preventing or reducing low speed pre-ignition events in a spark-ignited internal combustion engine is provided. The fuel composition includes a hydrocarbon fuel boiling the gasoline or diesel range and a primary additive having a structure given by or a salt thereof. A is a ring moiety; R1 and R2 are independently H, C1-C20 hydrocarbyl group, carboxyl group, ether, or hydroxyl group. R 3 and R 4 are independently H, C1-C20 hydrocarbyl group, carboxyl group, ether, amino, or hydroxyl group or wherein R 3 and R 4 are part of a cyclic group. R5 is C1-C100 hydrocarbyl group, carboxyl group, ether, or hydroxyl group; and p is 0 to 2, n is 1 to 3, m is 1 to 3, and p+n+m is less than 5.

Abstract: Method for preventing or reducing low speed pre-ignition events in a spark-ignited internal combustion engine is provided. The method includes supplying to the engine the lubricant composition comprising a primary additive having a structure given by or a salt thereof. R1 and R2 are independently H, C1-C20 hydrocarbyl group, carboxyl group, ester, amide, ketone, ether, or hydroxyl group. R3 and R4 are independently H, C1-C20 hydrocarbyl group, carboxyl group, ester, amide, ketone, ether, amino, or hydroxyl group or wherein R3 and R4 are part of a cyclic group. R5 is C1-C100 hydrocarbyl group, carboxyl group, ether, or hydroxyl group. Lastly, p is 0 to 2, n is 1 to 5, m is 0 to 2, and p+n+m is less than 6.

Abstract: A memory module comprises dynamic random access memory (DRAM), Flash memory, and a module controller. The module controller is configured to receive data to be transferred from the DRAM to the Flash memory, compute first cyclic redundancy check (CRC) codes for the data, and write the data into the Flash memory. The module controller is further configured to read the data from the Flash memory, compute second CRC codes for the data read from the Flash memory, and transfer the data to the DRAM. The module controller is further configured to compare the second CRC codes with the first CRC codes to determine one or more erroneous data bits in the data read from the Flash memory, read a data segment of the data from the DRAM that include the one or more erroneous data bits, correct the one or more erroneous data bits in the data segment, and write the data segment back into the DRAM.

Abstract: A memory module comprises a volatile memory subsystem including DRAM, a non-volatile memory subsystem including Flash memory, and a module control device. The Flash memory includes main Flash providing a main Flash memory space and scratch Flash providing a scratch Flash memory space. The module control device is configured to receive a request from the memory controller to move one or more segments of data in a first Flash block in the main Flash to the DRAM and to, for each respective segment of data: select a respective set of pages in the DRAM; transfer respective data stored in the respective set of pages from the DRAM to a corresponding segment in the scratch Flash; and transfer the respective segment of data to the respective set of pages in the DRAM. Thus, data can be moved segment by segment between the DRAM and the Flash memory.

Abstract: A memory module comprises a volatile memory subsystem including DRAM, a non-volatile memory subsystem including Flash memory, and a module control device. The Flash memory includes main Flash providing a main Flash memory space and scratch Flash providing a scratch Flash memory space. The module control device is configured to receive a request from the memory controller to move one or more segments of data in a first Flash block in the main Flash to the DRAM and to, for each respective segment of data: select a respective set of pages in the DRAM; transfer respective data stored in the respective set of pages from the DRAM to a corresponding segment in the scratch Flash; and transfer the respective segment of data to the respective set of pages in the DRAM. Thus, data can be moved segment by segment between the DRAM and the Flash memory.

Abstract: A memory module comprises a volatile memory subsystem configured to coupled to a memory channel in computer system and capable of serving as main memory for the computer system, a non-volatile memory subsystem providing storage for the computer system, and a module controller coupled to the volatile memory subsystem, the non-volatile memory subsystem, and the C/A bus. The module controller is configured to control intra-module data transfers between the volatile memory subsystem and the non-volatile memory subsystem. The module controller is further configured to monitor C/A signals on the C/A bus and schedule the intra-module data transfers in accordance with the C/A signals so that the intra-module data transfers do not conflict with accesses to the volatile memory subsystem by the memory controller.

Abstract: A memory module comprises a volatile memory subsystem configured to coupled to a memory channel in computer system and capable of serving as main memory for the computer system, a non-volatile memory subsystem providing storage for the computer system, and a module controller coupled to the volatile memory subsystem, the non-volatile memory subsystem, and the C/A bus. The module controller is configured to control intra-module data transfers between the volatile memory subsystem and the non-volatile memory subsystem. The module controller is further configured to monitor C/A signals on the C/A bus and schedule the intra-module data transfers in accordance with the C/A signals so that the intra-module data transfers do not conflict with accesses to the volatile memory subsystem by the memory controller.

Abstract: A memory module comprises a volatile memory subsystem configured to coupled to a memory channel in computer system and capable of serving as main memory for the computer system, a non-volatile memory subsystem providing storage for the computer system, and a module controller coupled to the volatile memory subsystem, the non-volatile memory subsystem, and the C/A bus. The module controller is configured to control intra-module data transfers between the volatile memory subsystem and the non-volatile memory subsystem. The module controller is further configured to monitor C/A signals on the C/A bus and schedule the intra-module data transfers in accordance with the C/A signals so that the intra-module data transfers do not conflict with accesses to the volatile memory subsystem by the memory controller.

Abstract: A memory module comprises a volatile memory subsystem configured to coupled to a memory channel in computer system and capable of serving as main memory for the computer system, a non-volatile memory subsystem providing storage for the computer system, and a module controller coupled to the volatile memory subsystem, the non-volatile memory subsystem, and the C/A bus. The module controller is configured to control intra-module data transfers between the volatile memory subsystem and the non-volatile memory subsystem. The module controller is further configured to monitor C/A signals on the C/A bus and schedule the intra-module data transfers in accordance with the C/A signals so that the intra-module data transfers do not conflict with accesses to the volatile memory subsystem by the memory controller.

Abstract: The system for displaying huge images in accordance with the present invention comprises: a storage device (1) for storing image data winch is divided in either one of the row direction and the column direction and contains at least two subdivided blocks; a first temporary storage device (9) for sequentially reading out data stored in the storage device (1), temporarily storing data as read and, when the data reaches a predetermined unit of data size, outputting all the data as input. And the present invention serves to improve the processing speed of huge images by bypassing the main storage device (3) during the processing operation of image data.

Abstract: A high-definition image display apparatus displays a high-definition mega-sized image on a computer display. The display apparatus includes a server 1 and a client 5 that operate in a coordinated manner. The display system comprises means for storing an cage in the server 1 in the form of a set of image data for several levels of resolution each of which is obtained through division of the image into a matrix as well as through compression and encryption; and input means for enabling visual performance of operations for specifying an image to be displayed on the screen of the client 5, zooming in/out, and scrolling the image.