Patents by Inventor Hao Liao

Hao Liao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240172258
    Abstract: A first wireless device reports to a base station at least one of (a) a capability of the first wireless device for path selection or path combining and (b) a supported frequency range on the second time-frequency resource. The first wireless device receives, from the base station, first control information indicating whether the first wireless device should receive data on the first time-frequency resource from the base station, on the second time-frequency resource from the second device, or both the first and second time-frequency resources, wherein the data are transmitted from the base station on the first time-frequency resource. The first wireless device receives the data based on the first control information.
    Type: Application
    Filed: November 17, 2023
    Publication date: May 23, 2024
    Inventors: Lung-Sheng Tsai, Chun-Hao Fang, Wei-Kai Chang, Chia-Hao Yu, Pei-Kai Liao
  • Publication number: 20240172083
    Abstract: A first wireless device receives, from a base station, a configuration of first reference signals to be transmitted on a first time-frequency resource and a configuration of second reference signals to be transmitted on a second time-frequency resource. The first wireless device measures one of the first reference signals and the second reference signals. The first wireless device switches to measuring the other one of the second reference signals, wherein the first reference signals are measured to generate first measurements and the second reference signals are measured to generate second measurements. The first wireless device obtains a selection of a communication path, for communicating data between the base station and the first wireless device. The first wireless device obtains a first radio frequency (RF) signal from one or more RF signals carried through the communication path.
    Type: Application
    Filed: November 17, 2023
    Publication date: May 23, 2024
    Inventors: Lung-Sheng Tsai, Chun-Hao Fang, Wei-Kai Chang, Chia-Hao Yu, Pei-Kai Liao
  • Patent number: 11989046
    Abstract: Disclosed herein are related to an integrated circuit to regulate a supply voltage. In one aspect, the integrated circuit includes a metal rail including a first point, at which a first functional circuit is connected, and a second point, at which a second functional circuit is connected. In one aspect, the integrate circuit includes a voltage regulator coupled between the first point of the metal rail and the second point of the metal rail. In one aspect, the voltage regulator senses a voltage at the second point of the metal rail and adjusts a supply voltage at the first point of the metal rail, according to the sensed voltage at the second point of the metal rail.
    Type: Grant
    Filed: February 6, 2023
    Date of Patent: May 21, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Haruki Mori, Hidehiro Fujiwara, Zhi-Hao Chang, Yangsyu Lin, Yu-Hao Hsu, Yen-Huei Chen, Hung-Jen Liao, Chiting Cheng
  • Patent number: 11991500
    Abstract: A speaker comprises a housing, a transducer residing inside the housing, and at least one sound guiding hole located on the housing. The transducer generates vibrations. The vibrations produce a sound wave inside the housing and cause a leaked sound wave spreading outside the housing from a portion of the housing. The at least one sound guiding hole guides the sound wave inside the housing through the at least one sound guiding hole to an outside of the housing. The guided sound wave interferes with the leaked sound wave in a target region. The interference at a specific frequency relates to a distance between the at least one sound guiding hole and the portion of the housing.
    Type: Grant
    Filed: April 23, 2023
    Date of Patent: May 21, 2024
    Assignee: SHENZHEN SHOKZ CO., LTD.
    Inventors: Xin Qi, Fengyun Liao, Jinbo Zheng, Qian Chen, Hao Chen
  • Patent number: 11990575
    Abstract: A light-emitting device comprises a substrate comprising a sidewall, a first top surface, and a second top surface, wherein the second top surface is closer to the sidewall of the substrate than the first top surface to the sidewall of the substrate; a semiconductor stack formed on the substrate comprising a first semiconductor layer, an active layer, and a second semiconductor layer; a dicing street surrounding the semiconductor stack, and exposing the first top surface and the second top surface of the substrate; a protective layer covering the semiconductor stack; a reflective layer comprising a Distributed Bragg Reflector structure covering the protective layer; and a cap layer covering the reflective layer, wherein the second top surface of the substrate is not covered by the protective layer, the reflective layer, and the cap layer.
    Type: Grant
    Filed: June 5, 2023
    Date of Patent: May 21, 2024
    Assignee: EPISTAR CORPORATION
    Inventors: Hsin-Ying Wang, Chih-Hao Chen, Chien-Chih Liao, Chao-Hsing Chen, Wu-Tsung Lo, Tsun-Kai Ko, Chen Ou
  • Publication number: 20240145380
    Abstract: In some embodiments, the present disclosure relates to an integrated chip that includes a first interconnect dielectric layer arranged over a substrate. An interconnect wire extends through the first interconnect dielectric layer, and a barrier structure is arranged directly over the interconnect wire. The integrated chip further includes an etch stop layer arranged over the barrier structure and surrounds outer sidewalls of the barrier structure. A second interconnect dielectric layer is arranged over the etch stop layer, and an interconnect via extends through the second interconnect dielectric layer, the etch stop layer, and the barrier structure to contact the interconnect wire.
    Type: Application
    Filed: January 5, 2024
    Publication date: May 2, 2024
    Inventors: Hsin-Chieh Yao, Chung-Ju Lee, Chih Wei Lu, Hsi-Wen Tien, Wei-Hao Liao, Yu-Teng Dai
  • Publication number: 20240141922
    Abstract: A heat dissipation system of an electronic device including a body, a plurality of heat sources disposed in the body, and at least one centrifugal heat dissipation fan disposed in the body is provided. The centrifugal heat dissipation fan includes a housing and an impeller disposed in the housing on an axis. The housing has at least one inlet on the axis and has a plurality of outlets in different radial directions, and the plurality of outlets respectively correspond to the plurality of heat sources.
    Type: Application
    Filed: January 9, 2024
    Publication date: May 2, 2024
    Applicant: Acer Incorporated
    Inventors: Tsung-Ting Chen, Wen-Neng Liao, Cheng-Wen Hsieh, Yu-Ming Lin, Wei-Chin Chen, Chun-Chieh Wang, Shu-Hao Kuo
  • Publication number: 20240143053
    Abstract: A mainboard device and an update method of the basic input-output system thereof are provided. The mainboard device includes a flash memory, a universal serial bus (USB) port, and a microprocessor. The code of the basic input-output system is stored in the flash memory. The USB port is connected to an external USB device, wherein the external USB device includes a supply power and stores an update code. The microprocessor includes a power-switching device coupled to the system power and the USB port. When the power-switching device detects that the system power does not provide power and the USB port is provided with the supply power, the microprocessor provides power to the flash memory based on the supply power, and the microprocessor accesses the update code of the external USB device to perform an update operation on the code in the flash memory.
    Type: Application
    Filed: September 22, 2023
    Publication date: May 2, 2024
    Inventors: Keng Hao Hsu, Che Min Liao
  • Patent number: 11970835
    Abstract: A grader and slope scraping control method and device include a grader having a front frame; a blade mounted on the front frame, an attitude of the blade is adjustable; an actuator for adjusting the attitude of the blade; a first angle detecting member for detecting a first inclination angle in a front and rear direction of the grader relative to a horizontal plane and a second inclination angle in a left and right direction relative to a horizontal plane; a blade detecting member for detecting attitude information of the blade relative to the front frame; and a controller, for obtaining an actual slope angle based on the first inclination angle, second inclination angle and attitude information, and make the actuator adjust attitude of the blade to a target slope angle when the actual slope angle is inconsistent with the preset target slope angle.
    Type: Grant
    Filed: December 29, 2020
    Date of Patent: April 30, 2024
    Assignee: JIANGSU XCMG CONSTRUCTION MACHINERY RESEARCH INSTITUTE LTD.
    Inventors: Bin Zhao, Hao Liao, Hao Liu, Ju He
  • Patent number: 11972975
    Abstract: A method of forming a semiconductor device structure is provided. The method includes forming a masking structure with first openings over a semiconductor substrate and correspondingly forming metal layers in the first openings. The method also includes recessing the masking structure to form second openings between the metal layers and forming a sacrificial layer surrounded by a first liner in each of the second openings. In addition, after forming a second liner over the sacrificial layer in each of the second openings, the method includes removing the sacrificial layer in each of the second openings to form a plurality of air gaps therefrom.
    Type: Grant
    Filed: June 24, 2021
    Date of Patent: April 30, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsi-Wen Tien, Wei-Hao Liao, Yu-Teng Dai, Hsin-Chieh Yao, Chih-Wei Lu, Chung-Ju Lee, Shau-Lin Shue
  • Patent number: 11966107
    Abstract: An anti-peep display device includes a display module and an anti-peep module disposed on the display module. The anti-peep module includes the following features. The first light incident surface faces the display surface, the second and third light incident surfaces are located on opposite sides of the first light incident surface, the first condensing portion is disposed corresponding to the second light incident surface and the first light source, the second condensing portion is disposed corresponding to the third light incident surface and the second light source, the first and second condensing portions convert beams of the first and second light sources into anti-peep beams with a beam angle less than 10 degrees, and the optical microstructures reflect the anti-peep beams and exit the anti-peep beams from the light guide plate. The present invention also provides an anti-peep method applicable to the anti-peep display device.
    Type: Grant
    Filed: June 14, 2023
    Date of Patent: April 23, 2024
    Assignee: CHAMP VISION DISPLAY INC.
    Inventors: Chung-Hao Wu, Hsin-Hung Lee, Chin-Ku Liu, Chun-Chien Liao, Wei-Jhe Chien
  • Publication number: 20240126174
    Abstract: A method includes the following steps. A photoresist is exposed to a first light-exposure through a first mask, wherein the first mask includes a first stitching region, and a first portion of the photoresist corresponding to a first opaque portion of the first stitching region is unexposed. The photoresist is exposed to a second light-exposure through a second mask, wherein the second mask includes a second stitching region, and a second portion of the photoresist corresponding to a second opaque portion of the second stitching region is unexposed and is overlapping with the first portion of the photoresist.
    Type: Application
    Filed: December 28, 2023
    Publication date: April 18, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Meng-Che Tu, Po-Han Wang, Sih-Hao Liao, Yu-Hsiang Hu, Hung-Jui Kuo
  • Patent number: 11957996
    Abstract: Disclosed is a microwave chemical method for totally extracting fluorine and rare earth from bastnaesite concentrate, including: alkaline conversion defluorination of bastnaesite through microwave irradiation, microwave-assisted leaching of fluorine, solid-liquid separation of leaching solution and microwave-assisted leaching of rare earth. The rare earth hydrochloric acid solution for leaching contains no fluorine ion, so that the fluorine interference of subsequent processes such as impurity removal can be completely avoided; the fluorine and the rare earth are leached with microwaves, which does not need the stirring, so that the automatic control is easy to implement; the fluorine and rare earth leaching speed is high, the leaching time is short and the complete leaching of fluorine and little residual alkali in the slag can be realized by two-time leaching; and no fluorine-containing waste water is discharged, and the total extraction of the rare earth can be realized by one-time leaching.
    Type: Grant
    Filed: April 26, 2021
    Date of Patent: April 16, 2024
    Assignee: Sichuan Normal University
    Inventors: Shilin Zhao, Hongcheng Zhang, Jun Ma, Yang Liao, Liyang Han, Meng Jiang, Hao Huang, Chaoqun Li, Xiaoting Li, Hongyan Shang
  • Patent number: 11963092
    Abstract: The application discloses a method for connecting to a network access device, a terminal and a computer-readable storage medium. The method includes: transmitting an association request message or a reassociation request message to the network access device; receiving an association response message or a reassociation response message sent by the network access device, wherein the association response message or the reassociation response message includes parameters of AP-EHT Capabilities, EHT Operation, TWT Responder Support and TWT Required, and wherein the AP-EHT Capabilities includes a field of AP-ML Support and the EHT Operation includes a field of AP-Primary Link; reading contents of the association response message or the reassociation response message, and performing a multi-link operation on the basis of the contents.
    Type: Grant
    Filed: July 17, 2020
    Date of Patent: April 16, 2024
    Assignee: CHENGDU XGIMI TECHNOLOGY CO., LTD.
    Inventors: Hao Wu, Fang Xie, Yang Liao
  • Patent number: 11963046
    Abstract: The application relates to the field of wireless communication, and discloses a roaming method in a multi-link scenario, a multi-link device and a storage medium. The roaming method in the multi-link scenario includes: selecting a target network access device that meets a condition; disconnecting a logical entity on a secondary link of an original network access device from the original network access device; establishing a connection of the logical entity with the target network access device; determining a link through which the logical entity is connected with the target network access device as a primary link; and disconnecting a connection of the other logical entity other than the logical entity with the original network access device. The application realizes roaming of a terminal among different network access devices through link management and interactive control, ensuring service continuity and avoiding packet loss.
    Type: Grant
    Filed: August 12, 2020
    Date of Patent: April 16, 2024
    Assignee: CHENGDU XGIMI TECHNOLOGY CO., LTD.
    Inventors: Hao Wu, Fang Xie, Yang Liao
  • Publication number: 20240120272
    Abstract: Embodiments of the present disclosure relates to a method for forming a semiconductor device structure. The method includes including forming one or more conductive features in a first interlayer dielectric (ILD), forming an etch stop layer on the first ILD, forming a second ILD over the etch stop layer, forming one or more openings through the second ILD and the etch stop layer to expose a top surface of the one or more first conductive features, wherein the one or more openings are formed by a first etch process in a first process chamber, exposing the one or more openings to a second etch process in a second process chamber so that the shape of the or more openings is elongated, and filling the one or more openings with a conductive material.
    Type: Application
    Filed: January 15, 2023
    Publication date: April 11, 2024
    Inventors: Wei-Hao LIAO, Hsi-Wen TIEN, Chih Wei LU, Yung-Hsu WU, Cherng-Shiaw TSAI, Chia-Wei SU
  • Publication number: 20240120200
    Abstract: Semiconductor device and the manufacturing method thereof are disclosed herein. An exemplary method of forming a semiconductor device comprises receiving a structure including a substrate and a first hard mask over the substrate, the first hard mask having at least two separate portions; forming spacers along sidewalls of the at least two portions of the first hard mask with a space between the spacers; forming a second hard mask in the space; forming a first cut in the at least two portions of the first hard mask; forming a second cut in the second hard mask; and depositing a cut hard mask in the first cut and the second cut.
    Type: Application
    Filed: December 18, 2023
    Publication date: April 11, 2024
    Inventors: Hsi-Wen Tien, Wei-Hao Liao, Pin-Ren Dai, Chih Wei Lu, Chung-Ju Lee
  • Publication number: 20240118178
    Abstract: A staining kit is provided, including a first pattern including antibodies against T cell, B cell, NK cell, monocyte, regulatory cell, CD8, CD45, and CTLA4; a second pattern including antibodies against T cell, B cell, NK cell, monocyte, regulatory cell, dendritic cell, and CD45; a third pattern including antibodies against T cell, B cell, NK cell, monocyte, CD8, CD45, CD45RA, CD62L, CD197, CX3CR1 and TCR??; and a fourth pattern including antibodies against B cell, CD23, CD38, CD40, CD45 and IgM, wherein the antibodies of each pattern are labeled with fluorescent dyes. A method of identifying characterized immune cell subsets of a disease and a method of predicting the likelihood of NPC in a subject in the need thereof using the staining kit are also provided.
    Type: Application
    Filed: October 5, 2022
    Publication date: April 11, 2024
    Applicant: FULLHOPE BIOMEDICAL CO., LTD.
    Inventors: Jan-Mou Lee, Li-Jen Liao, Yen-Ling Chiu, Chih-Hao Fang, Kai-Yuan Chou, Pei-Hsien Liu, Cheng-Yun Lee
  • Patent number: 11955501
    Abstract: The present disclosure describes a method for the formation of mirror micro-structures on radiation-sensing regions of image sensor devices. The method includes forming an opening within a front side surface of a substrate; forming a conformal implant layer on bottom and sidewall surfaces of the opening; growing a first epitaxial layer on the bottom and the sidewall surfaces of the opening; depositing a second epitaxial layer on the first epitaxial layer to fill the opening, where the second epitaxial layer forms a radiation-sensing region. The method further includes depositing a stack on exposed surfaces of the second epitaxial layer, where the stack includes alternating pairs of a high-refractive index material layer and a low-refractive index material layer.
    Type: Grant
    Filed: June 6, 2022
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shih-Yu Liao, Tsai-Hao Hung, Ying-Hsun Chen
  • Publication number: 20240113089
    Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes a die, an underfill layer, a patterned dielectric layer and a plurality of conductive terminals. The die has a front surface and a back surface opposite to the front surface. The underfill layer encapsulates the die, wherein a surface of the underfill layer and the back surface of the die are substantially coplanar to one another. The patterned dielectric layer is disposed on the back surface of the die. The conductive terminals are disposed on and in contact with a surface of the patterned dielectric layer and partially embedded in the patterned dielectric layer to be in contact with the die, wherein a portion of the surface of the patterned dielectric layer that directly under each of the conductive terminals is substantially parallel with the back surface of the die.
    Type: Application
    Filed: January 10, 2023
    Publication date: April 4, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tian Hu, Po-Han Wang, Sih-Hao Liao, Yu-Hsiang Hu, Hung-Jui Kuo