Patents by Inventor Hao Lu

Hao Lu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240194593
    Abstract: A method of forming a semiconductor device includes the following operations. A substrate is provided with an electric component. A composite dielectric layer is formed on the substrate and covers the electric component. An opening is formed through the composite dielectric layer. A directional etching process is performed to widen an upper portion of the opening. A metal feature is formed in the opening.
    Type: Application
    Filed: February 10, 2023
    Publication date: June 13, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Wei Su, Yung-Hsu Wu, Hsin-Ping Chen, Chih Wei LU, Wei-Hao Liao, Hsi-Wen Tien, Cherng-Shiaw Tsai
  • Publication number: 20240194765
    Abstract: A method of manufacturing a semiconductor device includes forming a multi-layer stack of alternating first layers of a first semiconductor material and second layers of a second semiconductor material on a semiconductor substrate, forming a first recess through the multi-layer stack, and laterally recessing sidewalls of the second layers of the multi-layer stack. The sidewalls are adjacent to the first recess. The method further includes forming inner spacers with respective seams adjacent to the recessed second layers of the multi-layer stack and performing an anneal treatment on the inner spacers to close the respective seams.
    Type: Application
    Filed: January 29, 2024
    Publication date: June 13, 2024
    Inventors: Yoh-Rong Liu, Wen-Kai Lin, Che-Hao Chang, Chi On Chui, Yung-Cheng Lu, Li-Chi Yu, Sen-Hong Syue
  • Publication number: 20240194229
    Abstract: The disclosure provides an in-memory search (IMS) memory cell, an IMS method and an IMS memory device. The IMS method comprises: encoding a search data and a storage data by a first IMS encoding into a first IMS encoded search data and a first IMS encoded storage data; encoding the first IMS encoded search data by a second IMS encoding into a plurality of search voltages; encoding the first IMS encoded storage data by the second IMS encoding into a plurality of threshold voltages of a plurality of memory cells of a plurality IMS memory cells of the IMS memory device; and searching the IMS memory cells by the search voltages to generate a search result.
    Type: Application
    Filed: December 12, 2022
    Publication date: June 13, 2024
    Inventors: Yun-Yuan WANG, Cheng-Hsien LU, Po-Hao TSENG, Ming-Hsiu LEE
  • Publication number: 20240194523
    Abstract: In some embodiments, the present disclosure relates to an integrated chip. The integrated chip includes an interconnect dielectric layer over a substrate. An interconnect via is within the interconnect dielectric layer, and an interconnect wire is over the interconnect via and within the interconnect dielectric layer. A protective layer surrounds the interconnect via. The interconnect via vertically extends through the protective layer to below a bottom of the protective layer. The protective layer continuously extends from along an outer sidewall of the interconnect via to along an outer sidewall of the interconnect wire in a first cross-sectional view.
    Type: Application
    Filed: February 21, 2024
    Publication date: June 13, 2024
    Inventors: Hsi-Wen Tien, Chung-Ju Lee, Chih Wei Lu, Hsin-Chieh Yao, Yu-Teng Dai, Wei-Hao Liao
  • Publication number: 20240192256
    Abstract: The present invention disclosed a method for calculating an oscillation damping ratio of a power grid, and relates to the field of power system operation and control. When a power system oscillates, an oscillation period, two oscillation extreme points, and an oscillation direct current component start to be detected. Then an oscillation decay time constant is calculated according to the two oscillation extreme points and the oscillation direct current component. The oscillation damping ratio is calculated through the oscillation decay time constant and the oscillation period. Compared with a conventional fitting method, the conventional fitting method cannot calculate and analyze the oscillation damping ratio in a cast that a complete oscillation waveform is not obtained. The method proposed by the present inventive patent may complete the calculation of the oscillation damping ratio in a case of obtaining 2 pieces of data, so as to accelerate the speed of calculation.
    Type: Application
    Filed: February 23, 2024
    Publication date: June 13, 2024
    Inventors: Yihui ZHANG, Libin WEN, Guangshi LIU, Qian DOU, Dongshan HUANG, Xiaoming WANG, Zhiyuan SUN, Guangling LU, Mingpo LI, Mosi LIU, Hao QIU, Xiaoyin QIU, Zhiyang YAO, Wei ZHANG
  • Patent number: 12010707
    Abstract: Provided are methods and apparatuses for transmitting and receiving control signaling and for determining information.
    Type: Grant
    Filed: December 28, 2022
    Date of Patent: June 11, 2024
    Assignee: ZTE Corporation
    Inventors: Shujuan Zhang, Yu Ngok Li, Bo Gao, Chuangxin Jiang, Nan Zhang, Hao Wu, Zhaohua Lu
  • Patent number: 12009893
    Abstract: Provided are a method and device for reporting channel state information (CSI), a method and device for processing channel state information, and a storage medium. The method for reporting channel state information includes: dividing M subbands to be reported into two sets; determining a relative value between CSI of each subband in a second set and CSI of a reference subband corresponding to the each subband in the second set; and reporting CSI of each subband in a first set and the relative value of the each subband in the second set to a base station.
    Type: Grant
    Filed: August 12, 2019
    Date of Patent: June 11, 2024
    Assignee: ZTE CORPORATION
    Inventors: Yong Li, Hao Wu, Yu Ngok Li, Zhaohua Lu, Yijian Chen
  • Patent number: 12009407
    Abstract: A method of forming a semiconductor device includes: forming a dummy gate structure over a nanostructure, where the nanostructure overlies a fin that protrudes above a substrate, where the nanostructure comprises alternating layers of a first semiconductor material and a second semiconductor material; forming openings in the nanostructure on opposing sides of the dummy gate structure, the openings exposing end portions of the first semiconductor material and end portions of the second semiconductor material; recessing the exposed end portions of the first semiconductor material to form first sidewall recesses; filling the first sidewall recesses with a multi-layer spacer film; removing at least one sublayer of the multi-layer spacer film to form second sidewall recesses; and forming source/drain regions in the openings after removing at least one sublayer, where the source/drain regions seal the second sidewall recesses to form sealed air gaps.
    Type: Grant
    Filed: April 20, 2023
    Date of Patent: June 11, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Wen-Kai Lin, Yung-Cheng Lu, Che-Hao Chang, Chi On Chui
  • Patent number: 12008803
    Abstract: A neural network training method and apparatus for image retrieval, and an electronic device are provided. A neural network includes: one feature extractor and a plurality of learners. The method includes: for each training image group, inputting three images of the training image group into the feature extractor, and determining features of the three images; for each image in each training image group, respectively multiplying the features of the image by a random weight corresponding to each learner, so as to obtain weighted features corresponding to each learner; for each image in each training image group, inputting the weighted features of the image corresponding to each learner into the corresponding learner, and determining a plurality of feature vectors of the image; and adjusting parameters of the neural network on based on the plurality of feature vectors of each image in a plurality of training image groups.
    Type: Grant
    Filed: August 25, 2020
    Date of Patent: June 11, 2024
    Assignee: UISEE TECHNOLOGIES (ZHEJIANG) LTD.
    Inventors: Hao Ren, Siyang Li, Hong Lu
  • Patent number: 12008943
    Abstract: The display panel includes a plurality of rows and a plurality of columns of pixel circuits, a plurality of rows of gate lines, a plurality rows of reset control lines, and a plurality of columns of data lines, a same row of pixel circuits corresponds to two rows of gate lines, and one/the other row of gate line is electrically connected to odd/even-numbered columns of pixel circuits in the row of pixel circuits, and provides a corresponding gate driving signal for the odd/even-numbered columns of pixel circuits; a same column of pixel circuits corresponds to two columns of data lines, and one/the other column of data line of the two columns of data lines is electrically connected to odd/even-numbered rows of pixel circuits, and provides a corresponding data voltage for the odd/even-numbered rows of pixel circuits.
    Type: Grant
    Filed: October 30, 2020
    Date of Patent: June 11, 2024
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Tian Dong, Can Zheng, Li Wang, Long Han, Yu Feng, Hao Zhang, Jiangnan Lu, Jie Zhang, Bo Wang, Jingquan Wang
  • Patent number: 12009979
    Abstract: Systems and methods are provided for zero-touch provisioning of devices, such as sensors, on a network. When a device is unable/cannot access a network via Ethernet, cellular, or near field communications capabilities resident on the device, the device can alternatively be provisioned via an intermediate network device, such as an access point using, e.g., Device Provisioning Protocol or Wi-Fi EasyConnect. A cloud-based network management system may receive a device's bootstrapping information during or after manufacturing of the device. Ultimately, the device, via the intermediate network device, is able to communicate with a back-end, cloud-based network insight system from which configuration parameters for the device may be obtained.
    Type: Grant
    Filed: April 26, 2022
    Date of Patent: June 11, 2024
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Mohd Shahnawaz Siraj, Rahul Bahal, Kannan Konath, Hao Lu
  • Publication number: 20240184578
    Abstract: Methods and embodiments of a high-performance parallel multi-literal matching algorithm called NeoHarry. A chunk of data comprising a character string comprising n bytes is sampled for a byte stream, and data in the sampled chunk are pre-shifted to create shifted copies of data at multiple sampled locations. A mask table is generated having column vectors containing match indicia identifying potential character matches. A look up of the mask table at multiple sampled locations using the pre-shifted data is performed for a target literal character pattern. The mask table lookup results are combined to generate match candidates and exact match verification is performed to identify any generated match candidates that match the target literal character pattern. NeoHarry uses a column-vector-based shift-or model and implements a cross-domain shift algorithm under which character patterns spanning two domains are identified.
    Type: Application
    Filed: February 13, 2024
    Publication date: June 6, 2024
    Inventors: Hao CHANG, Geoffrey LANGDALE, Xiang WANG, Yang HONG, Wenjun ZHU, Kun QIU, Xusheng LU
  • Publication number: 20240184942
    Abstract: Provided is a method for analyzing oil film multi-field coupling characteristics of series friction pairs of an axial piston pump in the disclosure. According to the disclosure, based on an oil film independent analysis model of macro structures, motion states and heterogeneities of service conditions of three major friction pairs of the axial piston pair, surface microstructures of the friction pairs is introduced, and a solid-liquid-thermal multi-field coupling analysis method of the friction pairs is proposed for macro information interaction. Finally, a coupling solution of the oil film bearing characteristics of the multi-friction pairs of the system is realized by the multi-scale and multi-degree-of-freedom hydraulic-dynamic global coupling method.
    Type: Application
    Filed: November 21, 2023
    Publication date: June 6, 2024
    Inventors: Yan LU, Hao ZHANG, Xinbo QIAN, Xinyuan CHEN, Liangcai ZENG
  • Patent number: 12002410
    Abstract: An array substrate, a detection method for the array substrate, and a tiled display panel. In the array substrate, each of pixels (1) comprises sub-pixels (01) of at least three colors and a pixel driving chip (02) for driving each sub-pixel (01) to emit light; each sub-pixel (01) comprises at least one inorganic light-emitting diode; a display area (A1) further comprises: a positive signal line (Hm) connected to a positive electrode of each inorganic light-emitting diode, and a data signal line (Dm), a scanning line (Sn), and a reference signal line (Vm) connected to each pixel driving chip (02); each pixel driving chip (02) is used for writing signals of the data signal line (Dm) into the sub-pixels (01) of different colors under the control of the corresponding scanning line (Sn) in a time division manner.
    Type: Grant
    Filed: April 8, 2021
    Date of Patent: June 4, 2024
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Hao Chen, Zhenyu Zhang, Jiao Zhao, Li Xiao, Dongni Liu, Haoliang Zheng, Liang Chen, Minghua Xuan, Ming Yang, Xinhong Lu, Qi Qi
  • Patent number: 12002768
    Abstract: A semiconductor package and a manufacturing method for the semiconductor package are provided. The semiconductor package includes a molded semiconductor device, a first redistribution structure, and conductive vias. The molded semiconductor device comprises a sensor die with a first surface and a second surface opposite the first surface, wherein the sensor die has an input/output region and a sensing region at the first surface. The first redistribution structure is disposed on the first surface of the sensor die, wherein the first redistribution structure covers the input/output region and exposes the sensing region, and the first redistribution structure comprises a conductive layer having a redistribution pattern and a ring structure. The redistribution pattern is electrically connected with the sensor die. The ring structure surrounds the sensing region and is separated from the redistribution pattern, wherein the ring structure is closer to the sensing region than the redistribution pattern.
    Type: Grant
    Filed: August 27, 2021
    Date of Patent: June 4, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Chih Huang, Chih-Hao Chang, Po-Chun Lin, Chun-Ti Lu, Zheng-Gang Tsai, Shih-Wei Chen, Chia-Hung Liu, Hao-Yi Tsai, Chung-Shi Liu
  • Patent number: 12004158
    Abstract: Provided are an information element processing method and apparatus. The method includes: in the case where a time interval between control information for scheduling a first-type information element and the first-type information element is less than a predetermined threshold and a predetermined condition is satisfied, acquiring quasi co-location information of the first-type information element according to quasi co-location information of a second-type information element; or in the case where a time interval between control information for scheduling a first-type information element and the first-type information element is less than a predetermined threshold and a predetermined condition is not satisfied, processing the first-type information element in a predetermined processing manner. Further provided are a quasi co-location information acquisition method and apparatus, an information determination method and apparatus, and a storage medium.
    Type: Grant
    Filed: July 9, 2021
    Date of Patent: June 4, 2024
    Assignee: ZTE Corporation
    Inventors: Shujuan Zhang, Zhaohua Lu, Bo Gao, Hao Wu, Yu Ngok Li, Chuangxin Jiang, Zhen He
  • Patent number: 12000828
    Abstract: An embodiment of the disclosure provides an immunodetection chip, an immunodetection device and a using method. The immunodetection chip includes a substrate and a cover plate. The substrate is disposed opposite to the cover plate to form a detection chamber. One side, facing the cover plate, of the substrate is fixedly provided with substrate antibodies. An inside wall of the detection chamber is provided with a detection member. The detection member is configured to output a corresponding electrical signal while adsorbing biological magnetic beads. The substrate antibodies match with target antigens.
    Type: Grant
    Filed: March 25, 2019
    Date of Patent: June 4, 2024
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Hao Tang, Quanguo Zhou, Jiuyang Cheng, Lijia Zhou, Zhidong Wang, Yancheng Lu, Ronghua Lan
  • Patent number: 12004183
    Abstract: A transmitting and receiving point (TRP) divides data scheduled by one downlink control information (DCI) into N data parts, and transmits the N data parts to a receiving side, where N?1. A value of N and whether the N data parts have a correlation in a case of N>1 are determined by at least one of following scheduling information: a transmission configuration indicator (TCI) field, a demodulation reference signal (DMRS) port indicator, a modulation and coding scheme (MCS), a redundancy version (RV) or a new data indicator (NDI). After receiving the N data parts sent by the TRP, the receiving side determines whether the N data parts have the correlation according to at least one of the TCI, the DMRS port indicator, the MCS, the RV, or the NDI.
    Type: Grant
    Filed: January 10, 2022
    Date of Patent: June 4, 2024
    Assignee: ZTE Corporation
    Inventors: Chuangxin Jiang, Zhaohua Lu, Hao Wu, Bo Gao, YuNgok Li, Shujuan Zhang, Huahua Xiao, Wenjun Yan
  • Publication number: 20240175635
    Abstract: This disclosure is directed to a liquid cooling device having at least two collecting tanks and at least one pair of heat-exchange plates. The tanks are separated from each other. Each of the collecting tanks has a joint tube. Each of the heat-exchange plates is in elongated shape and the collecting tanks are connected serially by the heat-exchange plates. The two collecting tanks are connected by the pair of heat-exchange plates. Each of the heat-exchange plates has a channel extended along the longitudinal direction thereof. The channels in the heat-exchange plates are connected to the collecting tanks at two ends of the heat-exchange plates, respectively. The longitudinal directions of the channels of the heat-exchange plates between the collecting tanks are parallel to each other.
    Type: Application
    Filed: November 27, 2023
    Publication date: May 30, 2024
    Inventors: Kuan-Cheng LU, Chih-Hao HSIA, Wei-Fang WU, Meng-Yu CHEN
  • Publication number: 20240176998
    Abstract: Methods and apparatus for discrimitive semantic transfer and physics-inspired optimization in deep learning are disclosed. A computation training method for a convolutional neural network (CNN) includes receiving a sequence of training images in the CNN of a first stage to describe objects of a cluttered scene as a semantic segmentation mask. The semantic segmentation mask is received in a semantic segmentation network of a second stage to produce semantic features. Using weights from the first stage as feature extractors and weights from the second stage as classifiers, edges of the cluttered scene are identified using the semantic features.
    Type: Application
    Filed: February 2, 2024
    Publication date: May 30, 2024
    Inventors: Anbang YAO, Hao ZHAO, Ming LU, Yiwen GUO, Yurong CHEN