Patents by Inventor Hao-Min Huang

Hao-Min Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • METHOD AND APPARATUS FOR MULTI-LINK OPERATION
    Publication number: 20240163947
    Abstract: A method for multi-link operation (MLO) is provided. The method for MLO may be applied to an apparatus. The method for MLO may include the following steps. A multi-chip controller of the apparatus may assign different data to a plurality of chips of the apparatus, wherein each chip corresponds to one link of multi-links. Each chip may determine whether transmission of the assigned data has failed. A first chip of the chips may transmit the assigned data to an access point (AP) in response to the first chip determining that the transmission of the assigned data has not failed.
    Type: Application
    Filed: November 8, 2023
    Publication date: May 16, 2024
    Inventors: Cheng-Ying WU, Wei-Wen LIN, Shu-Min CHENG, Hui-Ping TSENG, Chi-Han HUANG, Chih-Chun KUO, Yang-Hung PENG, Hao-Hua KANG
  • Mask layout and exposing method for reducing diffraction effects by using a single mask in the process of semiconductor production
    Publication number: 20050196687
    Abstract: The present invention discloses appropriate layout design of a single mask and proper operation of exposing device in the process of semiconductor production for reducing diffraction effects caused by tiny pattern in exposing process, therefore effectively enhances the resolution in exposing process, and increases the yield.
    Type: Application
    Filed: April 25, 2005
    Publication date: September 8, 2005
    Inventors: Hao-Min Huang, Chen-Tung Huang
  • Mask layout and exposing method for reducing diffraction effects by using a single mask in the process of semiconductor production
    Patent number: 6924083
    Abstract: The present invention discloses appropriate layout design of a single mask and proper operation of exposing device in the process of semiconductor production for reducing diffraction effects caused by tiny pattern in exposing process, therefore effectively enhances the resolution in exposing process, and increases the yield.
    Type: Grant
    Filed: October 18, 2002
    Date of Patent: August 2, 2005
    Assignee: Tai-Saw Technology Co., Ltd.
    Inventors: Hao-Min Huang, Chen-Tung Huang
  • Mask layout and exposing method for reducing diffraction effects by using a single mask in the process of semiconductor production
    Publication number: 20040076889
    Abstract: The present invention discloses appropriate layout design of a single mask and proper operation of exposing device in the process of semiconductor production for reducing diffraction effects caused by tiny pattern in exposing process, therefore effectively enhances the resolution in exposing process, and increases the yield.
    Type: Application
    Filed: October 18, 2002
    Publication date: April 22, 2004
    Inventors: Hao-Min Huang, Chen-Tung Huang