Patents by Inventor Hao-Ming Chang

Hao-Ming Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11953448
    Abstract: A method for defect inspection includes receiving a substrate having a plurality of patterns; obtaining a gray scale image of the substrate, wherein the gray scale image includes a plurality of regions, and each of the regions has a gray scale value; comparing the gray scale value of each region to a gray scale references to define a first group, a second group and an Nth group, wherein each of the first group, the second group and the Nth group has at least a region; performing a calculation to obtain a score; and when the score is greater than a value, the substrate is determined to have an ESD defect, and when the score is less than the value, the substrate is determined to be free of the ESD defect.
    Type: Grant
    Filed: April 7, 2020
    Date of Patent: April 9, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Tsun-Cheng Tang, Hao-Ming Chang, Sheng-Chang Hsu, Cheng-Ming Lin
  • Patent number: 11944412
    Abstract: A blood pressure detection device manufactured by a semiconductor process includes a substrate, a microelectromechanical element, a gas-pressure-sensing element, a driving-chip element, an encapsulation layer and a valve layer. The substrate includes inlet apertures. The microelectromechanical element and the gas-pressure-sensing element are stacked and integrally formed on the substrate. The encapsulation layer is encapsulated and positioned on the substrate. A flowing-channel space is formed above the microelectromechanical element and the gas-pressure-sensing element. The encapsulation layer includes an outlet aperture in communication with an airbag. The driving-chip element controls the microelectromechanical element, the gas-pressure-sensing element and valve units to transport gas.
    Type: Grant
    Filed: June 2, 2021
    Date of Patent: April 2, 2024
    Assignee: MICROJET TECHNOLOGY CO., LTD.
    Inventors: Hao-Jan Mou, Ying-Lun Chang, Ching-Sung Lin, Chi-Feng Huang, Yung-Lung Han, Chang-Yen Tsai, Wei-Ming Lee, Chun-Yi Kuo, Tsung-I Lin
  • Publication number: 20240065664
    Abstract: A physiological signal measurement device is disclosed. In some implementations, the physiological signal measurement device includes a fixing element, a rack, a first sensor, and a second sensor. The fixing element is configured to be fixed on a limb of a user. The rack is configured to engage the fixing element and includes a first end and a second end distal to the first end. The first sensor is disposed on the first end of the rack. The sensor is disposed on the second end of the rack. The first end of the rack has a first stiffness, the second end of the rack has a second stiffness, and the first stiffness is higher than the second stiffness.
    Type: Application
    Filed: August 24, 2022
    Publication date: February 29, 2024
    Inventors: CHENG YAN GUO, KUAN JEN WANG, PEI-MING CHIEN, HAO-CHING CHANG
  • Patent number: 11906898
    Abstract: In a method of manufacturing a photo mask, a resist layer is formed over a mask blank, which includes a mask substrate, a phase shift layer disposed on the mask substrate and a light blocking layer disposed on the phase shift layer. A resist pattern is formed by using a lithographic operation. The light blocking layer is patterned by using the resist pattern as an etching mask. The phase shift layer is patterned by using the patterned light blocking layer as an etching mask. A border region of the mask substrate is covered with an etching hard cover, while a pattern region of the mask substrate is opened. The patterned light blocking layer in the pattern region is patterned through the opening of the etching hard cover. A photo-etching operation is performed on the pattern region to remove residues of the light blocking layer.
    Type: Grant
    Filed: August 10, 2020
    Date of Patent: February 20, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chun-Chieh Tien, Cheng-Hsuen Chiang, Chih-Ming Chen, Cheng-Ming Lin, Yen-Wei Huang, Hao-Ming Chang, Kuo-Chin Lin, Kuan-Shien Lee
  • Patent number: 11846729
    Abstract: A virtual reality positioning device including a casing, a plurality of lenses, and a plurality of optical positioning components is provided. The casing has a plurality of holes. The lenses are installed in the holes, respectively, where a field angle of each of the lenses is greater than or equal to 120 degrees and less than or equal to 160 degrees, and the lenses include convex lenses or Fresnel lenses. The optical positioning components are installed in the casing and aligned to the lenses, respectively. In addition, a virtual reality positioning system and manufacturing method of a virtual reality positioning device are provided.
    Type: Grant
    Filed: April 1, 2021
    Date of Patent: December 19, 2023
    Assignee: Acer Incorporated
    Inventors: Li Lin, Ker-Wei Lin, Chun-Ta Chen, Chun-Yu Chen, Hao-Ming Chang, Chun-Hsien Chen, Shih-Ting Huang, Hui-Yen Wang
  • Patent number: 11829071
    Abstract: The present disclosure provides a method for forming a semiconductor structure, including forming a photoresist layer over a wafer, exposing the photoresist layer with an actinic radiation by using an EUV photomask, wherein the EUV photomask includes a substrate, a reflective multi-layer stack over the substrate, an absorber layer over the reflective multi-layer stack, and a first patch layer proximal to the absorber layer.
    Type: Grant
    Filed: July 27, 2022
    Date of Patent: November 28, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventor: Hao-Ming Chang
  • Publication number: 20230367207
    Abstract: A method includes: inspecting a reticle in a reticle pod, the reticle pod including a sealed space to accommodate the reticle, and the reticle pod further comprising a window arranged on an upper surface of the reticle pod, wherein the inspecting is performed through the window; and moving the reticle out of the reticle pod for performing a lithography operation using the reticle.
    Type: Application
    Filed: July 30, 2023
    Publication date: November 16, 2023
    Inventors: WANG CHENG SHIH, HAO-MING CHANG, CHUNG-YANG HUANG, CHENG-MING LIN
  • Publication number: 20230367198
    Abstract: A method includes: providing a photomask used in extreme ultra violet (EUV) lithography; receiving information of the photomask; determining a bias voltage of an electron beam writer system according to the information; and performing a repairing operation on the photomask by the electron beam writer system with the bias voltage.
    Type: Application
    Filed: July 30, 2023
    Publication date: November 16, 2023
    Inventors: HAO-MING CHANG, CHING-CHIH CHUANG, HSIAO-CHEN LI
  • Patent number: 11815802
    Abstract: A method includes: providing a photomask, wherein the photomask includes a multilayer stack, a light-absorption layer, an anti-reflection coating and a light-absorption layer. The method further includes: receiving information on the photomask; determining a bias voltage according to the information; determining a scan recipe of an electron beam writer system based on the bias voltage; and performing a repairing operation on at least one of the anti-reflection coating and the light-absorption layer by the electron beam writer system with the scan recipe.
    Type: Grant
    Filed: August 27, 2021
    Date of Patent: November 14, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Hao-Ming Chang, Ching-Chih Chuang, Hsiao-Chen Li
  • Patent number: 11796909
    Abstract: A method of manufacturing a reticle includes: disposing the reticle in a reticle pod, the reticle pod forming a sealed space to accommodate the reticle, and the reticle pod comprising a window arranged on an upper surface of the reticle pod and configured to allow a radiation at a predetermined wavelength to pass through; and performing an inspection operation on the reticle through the window.
    Type: Grant
    Filed: April 25, 2022
    Date of Patent: October 24, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Wang Cheng Shih, Hao-Ming Chang, Chung-Yang Huang, Cheng-Ming Lin
  • Publication number: 20230278077
    Abstract: A method for cleaning a substrate is provided. The method includes following operations. A substrate is received. The substrate includes a first layer over a surface of the substrate and a second layer over the first layer. A plurality of particles are disposed over the surface of the first layer. A first mega sonic agitation is performed on the substrate with applying a first mixture. A second mega sonic agitation is performed on the substrate with applying a second mixture. A frequency of the first mega sonic agitation is greater than 3 MHz, and a frequency of the second mega sonic agitation is greater than 3 MHz. A flow rate of the first mixture is between approximately 1000 ml/min and approximately 5000 ml/min. A flow rate of the second mixture is between 1000 ml/min and approximately 3000 ml/min.
    Type: Application
    Filed: May 10, 2023
    Publication date: September 7, 2023
    Inventors: HAO-MING CHANG, CHIA-SHIH LIN
  • Publication number: 20230266661
    Abstract: A circuit layout patterning method includes: receiving a photomask substrate including a shielding layer; defining a chip region and a peripheral region adjacent to the chip region; forming a design pattern in the chip region; forming a reference pattern by emitting one first radiation shot and a beta pattern by emitting a plurality of second radiation shots in the peripheral region, wherein a pixel size of the first radiation shot is greater than a pixel size of the second radiation shot; comparing a width of the reference pattern and a width of the beta pattern; transferring the design pattern to the shielding layer if a difference between the width of the reference patterned and the width of the beta pattern is within a tolerance; and transferring the design pattern of the photomask to a semiconductor substrate.
    Type: Application
    Filed: April 9, 2023
    Publication date: August 24, 2023
    Inventors: CHENG-MING LIN, HAO-MING CHANG, CHIH-MING CHEN, CHUNG-YANG HUANG
  • Patent number: 11691187
    Abstract: A method for cleaning a substrate is provided. The method includes following operations. A substrate is received. The substrate has a plurality of conductive nanoparticles disposed over a surface of the substrate. A first mixture is applied to remove the conductive nanoparticles. The first mixture includes an SCl solution, DI water and O3. A second mixture is applied to the photomask substrate. The second mixture includes DI wafer and H2. A temperature of the second mixture is between approximately 20° C. and 40° C. The applying of the second mixture further includes a mega sonic agitation, and a frequency of the mega sonic agitation is greater than 3 MHz. A flow rate of the first mixture is between approximately 1000 ml/min and approximately 5000 ml/min. A flow rate of the second mixture is between 1000 ml/min and approximately 3000 ml/min.
    Type: Grant
    Filed: July 27, 2022
    Date of Patent: July 4, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Hao-Ming Chang, Chia-Shih Lin
  • Patent number: 11681215
    Abstract: A method for forming a photomask includes receiving a mask substrate including a protecting layer and a shielding layer formed thereon, removing portions of the shielding layer to form a patterned shielding layer, and providing a BSE detector to monitor the removing of the portions of the shielding layer. When a difference in BSE intensities obtained from the BSE detector is greater than approximately 30%, the removing of the portions of the shielding layer is stopped. The BSE intensity in following etching loops becomes stable.
    Type: Grant
    Filed: November 24, 2020
    Date of Patent: June 20, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Hsuan-Wen Wang, Hao-Ming Chang
  • Patent number: 11662660
    Abstract: A method for manufacturing a semiconductor includes: receiving a photomask substrate including a shielding layer; defining a chip region and a peripheral region adjacent to the chip region; forming a design pattern in the chip region; forming a reference pattern by emitting one first radiation shot and a beta pattern by emitting a plurality of second radiation shots in the peripheral region, wherein a pixel size of the first radiation shot is greater than a pixel size of the second radiation shot; comparing a reference roughness of a boundary of the reference pattern and a beta roughness of a boundary of the beta pattern; transferring the design pattern to the shielding layer if a difference between the reference roughness and the beta roughness is within a tolerance; and transferring the design pattern of the photomask to a semiconductor substrate.
    Type: Grant
    Filed: July 26, 2021
    Date of Patent: May 30, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Cheng-Ming Lin, Hao-Ming Chang, Chih-Ming Chen, Chung-Yang Huang
  • Patent number: 11624978
    Abstract: A method for manufacturing a semiconductor includes: receiving a photomask substrate including a shielding layer; defining a chip region and a peripheral region adjacent to the chip region; forming a design pattern in the chip region; forming a reference pattern by emitting one first radiation shot and a beta pattern by emitting a plurality of second radiation shots in the peripheral region, wherein a pixel size of the first radiation shot is greater than a pixel size of the second radiation shot; comparing a reference roughness of a boundary of the reference pattern and a beta roughness of a boundary of the beta pattern; transferring the design pattern to the shielding layer if a difference between the reference roughness and the beta roughness is within a tolerance; and transferring the design pattern of the photomask to a semiconductor substrate.
    Type: Grant
    Filed: July 26, 2021
    Date of Patent: April 11, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Cheng-Ming Lin, Hao-Ming Chang, Chih-Ming Chen, Chung-Yang Huang
  • Patent number: 11600484
    Abstract: A cleaning method applied in semiconductor manufacturing is provided. The method includes: receiving a substrate having a surface; identifying a location of a particle on the surface of the substrate; moving a cleaning apparatus toward the location of the particle; performing a cleaning operation, thereby removing the particle by spraying a cleaning liquid from the cleaning apparatus flowing against gravity and toward the surface of the substrate; detecting the surface of the substrate; and performing a second cleaning operation when a cleaning result of the detection is not acceptable. A semiconductor manufacturing method and a system for cleaning a substrate are also provided.
    Type: Grant
    Filed: August 22, 2019
    Date of Patent: March 7, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Shao-Chi Wei, Hao-Ming Chang
  • Publication number: 20230069679
    Abstract: A method includes: providing a photomask, wherein the photomask includes a multilayer stack, a light-absorption layer, an anti-reflection coating and a light-absorption layer. The method further includes: receiving information on the photomask; determining a bias voltage according to the information; determining a scan recipe of an electron beam writer system based on the bias voltage; and performing a repairing operation on at least one of the anti-reflection coating and the light-absorption layer by the electron beam writer system with the scan recipe.
    Type: Application
    Filed: August 27, 2021
    Publication date: March 2, 2023
    Inventors: HAO-MING CHANG, CHING-CHIH CHUANG, HSIAO-CHEN LI
  • Patent number: D1001199
    Type: Grant
    Filed: March 28, 2022
    Date of Patent: October 10, 2023
    Assignee: Acer Incorporated
    Inventors: Li Lin, Ker-Wei Lin, Chun-Ta Chen, Hao-Ming Chang
  • Patent number: D1001903
    Type: Grant
    Filed: March 28, 2022
    Date of Patent: October 17, 2023
    Assignee: Acer Incorporated
    Inventors: Li Lin, Ker-Wei Lin, Chun-Ta Chen, Hao-Ming Chang