Patents by Inventor Hao San

Hao San has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8994572
    Abstract: The objective of the invention is to provide an A/D converter that exhibits fewer malfunctions due to variations in manufacturing.
    Type: Grant
    Filed: September 6, 2012
    Date of Patent: March 31, 2015
    Assignee: Japan Science and Technology Agency
    Inventors: Hao San, Tsubasa Maruyama, Masao Hotta
  • Publication number: 20140300500
    Abstract: The objective of the invention is to provide an A/D converter that exhibits fewer malfunctions due to variations in manufacturing.
    Type: Application
    Filed: September 6, 2012
    Publication date: October 9, 2014
    Applicant: JAPAN SCIENCE AND TECHNOLOGY AGENCY
    Inventors: Hao San, Tsubasa Maruyama, Masao Hotta
  • Patent number: 8436757
    Abstract: To provide a complex bandpass ??AD modulator capable of suppressing the influence of an image component caused by a mismatch between I- and Q-channels on a signal component with low power consumption. A complex bandpass ??AD modulator 10 is configured by a subtraction unit 20, a complex bandpass filter 30, an addition unit 40, a noise extraction circuit unit 50, an ADC unit 60, and a DAC unit 70. The noise extraction circuit unit 50 extracts a quantized noise signal of the ADC unit 60 based on an input signal of the ADC unit 60 and an output signal of the DAC unit 70, delays the extracted quantized noise signal by one sample time, phase-rotates the delayed signal by a predetermined angle, and feeds back the rotated signal to the input side of the ADC unit 60. Thus, a complex bandpass ??AD modulator capable of suppressing the influence of the image component caused by a mismatch between I- and Q-channels on the signal component with low power consumption is provided.
    Type: Grant
    Filed: February 24, 2010
    Date of Patent: May 7, 2013
    Assignee: National University Corporation Gunma University
    Inventors: Hao San, Haruo Kobayashi
  • Publication number: 20110316729
    Abstract: To provide a complex bandpass ??AD modulator capable of suppressing the influence of an image component caused by a mismatch between I- and Q-channels on a signal component with low power consumption. A complex bandpass READ modulator 10 is configured by a subtraction unit 20, a complex bandpass filter 30, an addition unit 40, a noise extraction circuit unit 50, an ADC unit 60, and a DAC unit 70. The noise extraction circuit unit 50 extracts a quantized noise signal of the ADC unit 60 based on an input signal of the ADC unit 60 and an output signal of the DAC unit 70, delays the extracted quantized noise signal by one sample time, phase-rotates the delayed signal by a predetermined angle, and feeds back the rotated signal to the input side of the ADC unit 60. Thus, a complex bandpass ??AD modulator capable of suppressing the influence of the image component caused by a mismatch between I- and Q-channels on the signal component with low power consumption is provided.
    Type: Application
    Filed: February 24, 2010
    Publication date: December 29, 2011
    Applicant: NATIONAL UNIVERSITY CORPORATION GUNMA UNIVERSITY
    Inventors: Hao San, Haruo Kobayashi
  • Patent number: 7629911
    Abstract: A high-precision ?? modulator reduces nonlinear noise due to the use of a multibit DAC and has little hardware and power consumption. A digital signal is DA converted and fed back to a subtraction circuit supplied with an analog signal. The DAC used in this feedback circuit uses a DAC (DWADAC) that includes a weighted pointer so that input digital signals are supplied in order to a plurality of segment elements that construct the DAC. In this DWADAC, the construction and number of the pointer is set based on the type and order of the filter disposed before the ADC.
    Type: Grant
    Filed: August 1, 2006
    Date of Patent: December 8, 2009
    Assignee: National University Corporation Gunma University
    Inventors: Hiroyuki Hagiwara, Atsushi Motozawa, Haruo Kobayashi, Hao San
  • Publication number: 20090167581
    Abstract: A high-precision ?? modulator reduces nonlinear noise due to the use of a multibit DAC and has little hardware and power consumption. A digital signal is DA converted and fed back to a subtraction circuit supplied with an analog signal. The DAC used in this feedback circuit uses a DAC (DWADAC) that includes a weighted pointer so that input digital signals are supplied in order to a plurality of segment elements that construct the DAC. In this DWADAC, the construction and number of the pointer is set based on the type and order of the filter disposed before the ADC.
    Type: Application
    Filed: August 1, 2006
    Publication date: July 2, 2009
    Applicant: National University Corporation Gunma University
    Inventors: Hiroyuki Hagiwara, Atsushi Motozawa, Haruo Kobayashi, Hao San
  • Patent number: 7227482
    Abstract: In a first-order complex band-pass filter, multiplexers are alternately switched over between time intervals of phases A and B, where the multiplexers includes two multiplexers provided at input and output stages, and a multiplexer provided in a feedback circuit of each of first-order filters and being switching over whether to invert a sign of a feedback signal. Then in a circuit part sandwiched between the multiplexers, a processing performed by an I circuit part and a processing performed by a Q circuit part are alternately switched over so that a sign of a signal inputted to an adder is inverted.
    Type: Grant
    Filed: April 24, 2006
    Date of Patent: June 5, 2007
    Assignee: Semiconductor Technology Academic Research Center
    Inventors: Hao San, Haruo Kobayashi, Hiroki Wada, Akira Hayakawa, Hiroyuki Hagiwara, Yoshitaka Jingu, Kazuyuki Kobayashi, Toshiro Tsukada
  • Publication number: 20060284751
    Abstract: In a first-order complex band-pass filter, multiplexers are alternately switched over between time intervals of phases A and B, where the multiplexers includes two multiplexers provided at input and output stages, and a multiplexer provided in a feedback circuit of each of first-order filters and being switching over whether to invert a sign of a feedback signal. Then in a circuit part sandwiched between the multiplexers, a processing performed by an I circuit part and a processing performed by a Q circuit part are alternately switched over so that a sign of a signal inputted to an adder is inverted.
    Type: Application
    Filed: April 24, 2006
    Publication date: December 21, 2006
    Applicant: Semiconductor Technology Academic Research Center
    Inventors: Hao San, Haruo Kobayashi, Hiroki Wada, Akira Hayakawa, Hiroyuki Hagiwara, Yoshitaka Jingu, Kazuyuki Kobayashi, Toshiro Tsukada
  • Patent number: 7098828
    Abstract: A complex band-pass ?? AD modulator is provided with a subtracter device, a complex band-pass filter, first and second AD converters, and first and second DA converters. The first and second DA converters and first and second logic circuits are sandwiched by first and second multiplexers. At a first timing of a clock signal, the first multiplexer inputs and outputs the first and second digital signals as they are, and at a second timing thereof, the first multiplexer inputs the first and second digital signals, and outputs the first digital signal as a second digital signal and outputs the second digital signal as a first digital signal. The second multiplexer inputs and outputs first and second analog signals similarly. The first and second logic circuits substantially noise-shapes non-linearities of the first and second DA converters by realizing complex digital and analog filters, using high-pass and low-pass element rotation methods.
    Type: Grant
    Filed: June 22, 2005
    Date of Patent: August 29, 2006
    Assignee: Semiconductor Technology Academic Research Center
    Inventors: Hao San, Haruo Kobayashi, Hiroki Wada, Atsushi Wada
  • Patent number: 7095350
    Abstract: A DA converter circuit is provided for use in a ?? AD modulator. The DA converter circuit includes a DA converter of segment switched capacitor type. The DA converter includes an operational amplifier, capacitors as connected in parallel to each other to supply electric charges to the operational amplifier, an electrically charging switch for switching of electrically charging electric charges onto the respective capacitors or not, and an electrically discharging switch for switching or not electrically discharging electric charges from the respective capacitors or not. A switch device performs either one of the electrically charging, the electrically discharging, grounding, and polarity inversion onto the respective capacitors. A controller controls the electrically charging switch, the electrically discharging switch and the switch device to execute a process of second-order DWA algorithm for performing a second-order noise shaping of a non-linearity of the DA converter circuit.
    Type: Grant
    Filed: June 22, 2005
    Date of Patent: August 22, 2006
    Assignee: Semiconductor Technology Academic Research Center
    Inventors: Hiroyuki Hagiwara, Haruo Kobayashi, Hao San, Atsushi Wada
  • Publication number: 20050285768
    Abstract: A DA converter circuit is provided for use in a ?? AD modulator. The DA converter circuit includes a DA converter of segment switched capacitor type. The DA converter includes an operational amplifier, capacitors as connected in parallel to each other to supply electric charges to the operational amplifier, an electrically charging switch for switching of electrically charging electric charges onto the respective capacitors or not, and an electrically discharging switch for switching or not electrically discharging electric charges from the respective capacitors or not. A switch device performs either one of the electrically charging, the electrically discharging, grounding, and polarity inversion onto the respective capacitors. A controller controls the electrically charging switch, the electrically discharging switch and the switch device to execute a process of second-order DWA algorithm for performing a second-order noise shaping of a non-linearity of the DA converter circuit.
    Type: Application
    Filed: June 22, 2005
    Publication date: December 29, 2005
    Applicant: Semiconductor Technology Academic Research Center
    Inventors: Hiroyuki Hagiwara, Haruo Kobayashi, Hao San, Atsushi Wada
  • Publication number: 20050285766
    Abstract: A complex band-pass ?? AD modulator is provided with a subtracter device, a complex band-pass filter, first and second AD converters, and first and second DA converters. The first and second DA converters and first and second logic circuits are sandwiched by first and second multiplexers. At a first timing of a clock signal, the first multiplexer inputs and outputs the first and second digital signals as they are, and at a second timing thereof, the first multiplexer inputs the first and second digital signals, and outputs the first digital signal as a second digital signal and outputs the second digital signal as a first digital signal. The second multiplexer inputs and outputs first and second analog signals similarly. The first and second logic circuits substantially noise-shapes non-linearities of the first and second DA converters by realizing complex digital and analog filters, using high-pass and low-pass element rotation methods.
    Type: Application
    Filed: June 22, 2005
    Publication date: December 29, 2005
    Applicant: Semiconductor Technology Academic Research Center
    Inventors: Hao San, Haruo Kobayashi, Hiroki Wada, Atsushi Wada