Abstract: Provided is a system for detecting an anomaly in a multivariate time series that includes at least one processor programmed or configured to receive a dataset of a plurality of data instances, wherein each data instance comprises a time series of data points, determine a set of target data instances based on the dataset, determine a set of historical data instances based on the dataset, generate, based on the set of target data instances, a true value matrix, a true frequency matrix, and a true correlation matrix, generate a forecast value matrix, a forecast frequency matrix, and a forecast correlation matrix based on the set of target data instances and the set of historical data instances, determine an amount of forecasting error, and determine whether the amount of forecasting error corresponds to an anomalous event associated with the dataset of data instances. Methods and computer program products are also provided.

Abstract: Systems, methods, and computer program products for predicting user preference of items in an image process image data associated with a single image with a first branch of a neural network to produce an image embedding, the single image including a set of multiple items; process a user identifier of a user with a second branch of the neural network to produce a user embedding; concatenate the image embedding with the user embedding to produce a concatenated embedding; process the concatenated embedding with the neural network to produce a joint embedding; and generate a user preference score for the set of multiple items from the neural network based on the joint embedding, the user preference score including a prediction of whether the user prefers the set of multiple items.

Abstract: A method includes receiving a first data set comprising embeddings of first and second types, generating a fixed adjacency matrix from the first dataset, and applying a first stochastic binary mask to the fixed adjacency matrix to obtain a first subgraph of the fixed adjacency matrix. The method also includes processing the first subgraph through a first layer of a graph convolutional network (GCN) to obtain a first embedding matrix, and applying a second stochastic binary mask to the fixed adjacency matrix to obtain a second subgraph of the fixed adjacency matrix. The method includes processing the first embedding matrix and the second subgraph through a second layer of the GCN to obtain a second embedding matrix, and then determining a plurality of gradients of a loss function, and modifying the first stochastic binary mask and the second stochastic binary mask using at least one of the plurality of gradients.

Abstract: The objective of the invention is to provide an A/D converter that exhibits fewer malfunctions due to variations in manufacturing.

Abstract: The objective of the invention is to provide an A/D converter that exhibits fewer malfunctions due to variations in manufacturing.

Abstract: To provide a complex bandpass ??AD modulator capable of suppressing the influence of an image component caused by a mismatch between I- and Q-channels on a signal component with low power consumption. A complex bandpass ??AD modulator 10 is configured by a subtraction unit 20, a complex bandpass filter 30, an addition unit 40, a noise extraction circuit unit 50, an ADC unit 60, and a DAC unit 70. The noise extraction circuit unit 50 extracts a quantized noise signal of the ADC unit 60 based on an input signal of the ADC unit 60 and an output signal of the DAC unit 70, delays the extracted quantized noise signal by one sample time, phase-rotates the delayed signal by a predetermined angle, and feeds back the rotated signal to the input side of the ADC unit 60. Thus, a complex bandpass ??AD modulator capable of suppressing the influence of the image component caused by a mismatch between I- and Q-channels on the signal component with low power consumption is provided.

Abstract: To provide a complex bandpass ??AD modulator capable of suppressing the influence of an image component caused by a mismatch between I- and Q-channels on a signal component with low power consumption. A complex bandpass READ modulator 10 is configured by a subtraction unit 20, a complex bandpass filter 30, an addition unit 40, a noise extraction circuit unit 50, an ADC unit 60, and a DAC unit 70. The noise extraction circuit unit 50 extracts a quantized noise signal of the ADC unit 60 based on an input signal of the ADC unit 60 and an output signal of the DAC unit 70, delays the extracted quantized noise signal by one sample time, phase-rotates the delayed signal by a predetermined angle, and feeds back the rotated signal to the input side of the ADC unit 60. Thus, a complex bandpass ??AD modulator capable of suppressing the influence of the image component caused by a mismatch between I- and Q-channels on the signal component with low power consumption is provided.

Abstract: A high-precision ?? modulator reduces nonlinear noise due to the use of a multibit DAC and has little hardware and power consumption. A digital signal is DA converted and fed back to a subtraction circuit supplied with an analog signal. The DAC used in this feedback circuit uses a DAC (DWADAC) that includes a weighted pointer so that input digital signals are supplied in order to a plurality of segment elements that construct the DAC. In this DWADAC, the construction and number of the pointer is set based on the type and order of the filter disposed before the ADC.

Abstract: A high-precision ?? modulator reduces nonlinear noise due to the use of a multibit DAC and has little hardware and power consumption. A digital signal is DA converted and fed back to a subtraction circuit supplied with an analog signal. The DAC used in this feedback circuit uses a DAC (DWADAC) that includes a weighted pointer so that input digital signals are supplied in order to a plurality of segment elements that construct the DAC. In this DWADAC, the construction and number of the pointer is set based on the type and order of the filter disposed before the ADC.

Abstract: In a first-order complex band-pass filter, multiplexers are alternately switched over between time intervals of phases A and B, where the multiplexers includes two multiplexers provided at input and output stages, and a multiplexer provided in a feedback circuit of each of first-order filters and being switching over whether to invert a sign of a feedback signal. Then in a circuit part sandwiched between the multiplexers, a processing performed by an I circuit part and a processing performed by a Q circuit part are alternately switched over so that a sign of a signal inputted to an adder is inverted.

Abstract: In a first-order complex band-pass filter, multiplexers are alternately switched over between time intervals of phases A and B, where the multiplexers includes two multiplexers provided at input and output stages, and a multiplexer provided in a feedback circuit of each of first-order filters and being switching over whether to invert a sign of a feedback signal. Then in a circuit part sandwiched between the multiplexers, a processing performed by an I circuit part and a processing performed by a Q circuit part are alternately switched over so that a sign of a signal inputted to an adder is inverted.

Abstract: A complex band-pass ?? AD modulator is provided with a subtracter device, a complex band-pass filter, first and second AD converters, and first and second DA converters. The first and second DA converters and first and second logic circuits are sandwiched by first and second multiplexers. At a first timing of a clock signal, the first multiplexer inputs and outputs the first and second digital signals as they are, and at a second timing thereof, the first multiplexer inputs the first and second digital signals, and outputs the first digital signal as a second digital signal and outputs the second digital signal as a first digital signal. The second multiplexer inputs and outputs first and second analog signals similarly. The first and second logic circuits substantially noise-shapes non-linearities of the first and second DA converters by realizing complex digital and analog filters, using high-pass and low-pass element rotation methods.

Abstract: A DA converter circuit is provided for use in a ?? AD modulator. The DA converter circuit includes a DA converter of segment switched capacitor type. The DA converter includes an operational amplifier, capacitors as connected in parallel to each other to supply electric charges to the operational amplifier, an electrically charging switch for switching of electrically charging electric charges onto the respective capacitors or not, and an electrically discharging switch for switching or not electrically discharging electric charges from the respective capacitors or not. A switch device performs either one of the electrically charging, the electrically discharging, grounding, and polarity inversion onto the respective capacitors. A controller controls the electrically charging switch, the electrically discharging switch and the switch device to execute a process of second-order DWA algorithm for performing a second-order noise shaping of a non-linearity of the DA converter circuit.

Abstract: A DA converter circuit is provided for use in a ?? AD modulator. The DA converter circuit includes a DA converter of segment switched capacitor type. The DA converter includes an operational amplifier, capacitors as connected in parallel to each other to supply electric charges to the operational amplifier, an electrically charging switch for switching of electrically charging electric charges onto the respective capacitors or not, and an electrically discharging switch for switching or not electrically discharging electric charges from the respective capacitors or not. A switch device performs either one of the electrically charging, the electrically discharging, grounding, and polarity inversion onto the respective capacitors. A controller controls the electrically charging switch, the electrically discharging switch and the switch device to execute a process of second-order DWA algorithm for performing a second-order noise shaping of a non-linearity of the DA converter circuit.

Abstract: A complex band-pass ?? AD modulator is provided with a subtracter device, a complex band-pass filter, first and second AD converters, and first and second DA converters. The first and second DA converters and first and second logic circuits are sandwiched by first and second multiplexers. At a first timing of a clock signal, the first multiplexer inputs and outputs the first and second digital signals as they are, and at a second timing thereof, the first multiplexer inputs the first and second digital signals, and outputs the first digital signal as a second digital signal and outputs the second digital signal as a first digital signal. The second multiplexer inputs and outputs first and second analog signals similarly. The first and second logic circuits substantially noise-shapes non-linearities of the first and second DA converters by realizing complex digital and analog filters, using high-pass and low-pass element rotation methods.