Abstract: Described are a system, method, and computer program product for denoising sequential machine learning models. The method includes receiving data associated with a plurality of sequences and training a sequential machine learning model based on the data associated with the plurality of sequences to produce a trained sequential machine learning model. Training the sequential machine learning model includes denoising a plurality of sequential dependencies between items in the plurality of sequences using at least one trainable binary mask. The method also includes generating an output of the trained sequential machine learning model based on the denoised sequential dependencies. The method further includes generating a prediction of an item associated with a sequence of items based on the output of the trained sequential machine learning model.

Abstract: An electronic device is provided. The electronic device includes a base and a semiconductor device. The base has a top surface and a bottom surface. The semiconductor device is disposed on the top surface of the base. The semiconductor device has a device edge located within the base in a top view. The base has a unit pad array which is covered by the semiconductor device and electrically connected to the semiconductor device. The unit pad array includes a first pad region composed of a first row and a second row of the unit pad array. The first pad region includes first pads for transmitting commands and addresses to and from the semiconductor device. The first row of the unit pad array is arranged so that it is closer to the device edge than the second row of the unit pad array.

Abstract: In various embodiments, a serverless function agent determines that a client stub function has been invoked with a first set of arguments in a first execution environment. The serverless function agent then performs one or more operations on a media item that is associated with a first argument included in the first set of arguments to generate a second argument included in a second set of arguments. Notably, the first argument has a first data type and the second argument has a second data type. Subsequently, the serverless function agent invokes a function with the second set of arguments in a second execution environment. Advantageously, because the serverless function agent automatically performs operations on the media item, the overall amount of technical know-how and manual effort required to enable the function to successfully execute on a wide range of media items can be reduced.

Abstract: A computer obtains node embeddings, node periodicity classifications, edge embeddings, and edge periodicity classifications for each time of a time period. The computer determines subgraph embeddings based on a subgraph of the graph, times in the time period, the node embeddings for nodes in the subgraph, the edge embeddings for edges in the subgraph, the node periodicity classifications for the nodes in the subgraph, and the edge periodicity classifications for the edges in the subgraph. The computer translates each subgraph embedding of the subgraph embeddings for each time of the time period into projected subgraph embeddings. For the subgraph, the computer aggregates the plurality of projected subgraph embeddings into an aggregated subgraph embedding. The computer determines if the subgraph is periodic based upon at least the aggregated subgraph embedding.

Abstract: Disclosed are a system, method, and computer program product for user network activity anomaly detection. The method includes generating a multilayer graph from network resource data, and generating an adjacency matrix associated with each layer of the multilayer graph to produce a plurality of adjacency matrices. The method further includes assigning a weight to each adjacency matrix to produce a plurality of weights, and generating a merged single layer graph by merging the plurality of layers based on a weighted sum of the plurality of adjacency matrices using the plurality of weights. The method further includes generating a set of anomaly scores by generating, for each node in the merged single layer graph, an anomaly score. The method further includes determining a set of anomalous users based on the set of anomaly scores, detecting fraudulent network activity based on the set of anomalous users, and executing a fraud mitigation process.

Abstract: The objective of the invention is to provide an A/D converter that exhibits fewer malfunctions due to variations in manufacturing.

Abstract: The objective of the invention is to provide an A/D converter that exhibits fewer malfunctions due to variations in manufacturing.

Abstract: To provide a complex bandpass ??AD modulator capable of suppressing the influence of an image component caused by a mismatch between I- and Q-channels on a signal component with low power consumption. A complex bandpass ??AD modulator 10 is configured by a subtraction unit 20, a complex bandpass filter 30, an addition unit 40, a noise extraction circuit unit 50, an ADC unit 60, and a DAC unit 70. The noise extraction circuit unit 50 extracts a quantized noise signal of the ADC unit 60 based on an input signal of the ADC unit 60 and an output signal of the DAC unit 70, delays the extracted quantized noise signal by one sample time, phase-rotates the delayed signal by a predetermined angle, and feeds back the rotated signal to the input side of the ADC unit 60. Thus, a complex bandpass ??AD modulator capable of suppressing the influence of the image component caused by a mismatch between I- and Q-channels on the signal component with low power consumption is provided.

Abstract: To provide a complex bandpass ??AD modulator capable of suppressing the influence of an image component caused by a mismatch between I- and Q-channels on a signal component with low power consumption. A complex bandpass READ modulator 10 is configured by a subtraction unit 20, a complex bandpass filter 30, an addition unit 40, a noise extraction circuit unit 50, an ADC unit 60, and a DAC unit 70. The noise extraction circuit unit 50 extracts a quantized noise signal of the ADC unit 60 based on an input signal of the ADC unit 60 and an output signal of the DAC unit 70, delays the extracted quantized noise signal by one sample time, phase-rotates the delayed signal by a predetermined angle, and feeds back the rotated signal to the input side of the ADC unit 60. Thus, a complex bandpass ??AD modulator capable of suppressing the influence of the image component caused by a mismatch between I- and Q-channels on the signal component with low power consumption is provided.

Abstract: A high-precision ?? modulator reduces nonlinear noise due to the use of a multibit DAC and has little hardware and power consumption. A digital signal is DA converted and fed back to a subtraction circuit supplied with an analog signal. The DAC used in this feedback circuit uses a DAC (DWADAC) that includes a weighted pointer so that input digital signals are supplied in order to a plurality of segment elements that construct the DAC. In this DWADAC, the construction and number of the pointer is set based on the type and order of the filter disposed before the ADC.

Abstract: A high-precision ?? modulator reduces nonlinear noise due to the use of a multibit DAC and has little hardware and power consumption. A digital signal is DA converted and fed back to a subtraction circuit supplied with an analog signal. The DAC used in this feedback circuit uses a DAC (DWADAC) that includes a weighted pointer so that input digital signals are supplied in order to a plurality of segment elements that construct the DAC. In this DWADAC, the construction and number of the pointer is set based on the type and order of the filter disposed before the ADC.

Abstract: In a first-order complex band-pass filter, multiplexers are alternately switched over between time intervals of phases A and B, where the multiplexers includes two multiplexers provided at input and output stages, and a multiplexer provided in a feedback circuit of each of first-order filters and being switching over whether to invert a sign of a feedback signal. Then in a circuit part sandwiched between the multiplexers, a processing performed by an I circuit part and a processing performed by a Q circuit part are alternately switched over so that a sign of a signal inputted to an adder is inverted.

Abstract: In a first-order complex band-pass filter, multiplexers are alternately switched over between time intervals of phases A and B, where the multiplexers includes two multiplexers provided at input and output stages, and a multiplexer provided in a feedback circuit of each of first-order filters and being switching over whether to invert a sign of a feedback signal. Then in a circuit part sandwiched between the multiplexers, a processing performed by an I circuit part and a processing performed by a Q circuit part are alternately switched over so that a sign of a signal inputted to an adder is inverted.

Abstract: A complex band-pass ?? AD modulator is provided with a subtracter device, a complex band-pass filter, first and second AD converters, and first and second DA converters. The first and second DA converters and first and second logic circuits are sandwiched by first and second multiplexers. At a first timing of a clock signal, the first multiplexer inputs and outputs the first and second digital signals as they are, and at a second timing thereof, the first multiplexer inputs the first and second digital signals, and outputs the first digital signal as a second digital signal and outputs the second digital signal as a first digital signal. The second multiplexer inputs and outputs first and second analog signals similarly. The first and second logic circuits substantially noise-shapes non-linearities of the first and second DA converters by realizing complex digital and analog filters, using high-pass and low-pass element rotation methods.

Abstract: A DA converter circuit is provided for use in a ?? AD modulator. The DA converter circuit includes a DA converter of segment switched capacitor type. The DA converter includes an operational amplifier, capacitors as connected in parallel to each other to supply electric charges to the operational amplifier, an electrically charging switch for switching of electrically charging electric charges onto the respective capacitors or not, and an electrically discharging switch for switching or not electrically discharging electric charges from the respective capacitors or not. A switch device performs either one of the electrically charging, the electrically discharging, grounding, and polarity inversion onto the respective capacitors. A controller controls the electrically charging switch, the electrically discharging switch and the switch device to execute a process of second-order DWA algorithm for performing a second-order noise shaping of a non-linearity of the DA converter circuit.

Abstract: A complex band-pass ?? AD modulator is provided with a subtracter device, a complex band-pass filter, first and second AD converters, and first and second DA converters. The first and second DA converters and first and second logic circuits are sandwiched by first and second multiplexers. At a first timing of a clock signal, the first multiplexer inputs and outputs the first and second digital signals as they are, and at a second timing thereof, the first multiplexer inputs the first and second digital signals, and outputs the first digital signal as a second digital signal and outputs the second digital signal as a first digital signal. The second multiplexer inputs and outputs first and second analog signals similarly. The first and second logic circuits substantially noise-shapes non-linearities of the first and second DA converters by realizing complex digital and analog filters, using high-pass and low-pass element rotation methods.

Abstract: A DA converter circuit is provided for use in a ?? AD modulator. The DA converter circuit includes a DA converter of segment switched capacitor type. The DA converter includes an operational amplifier, capacitors as connected in parallel to each other to supply electric charges to the operational amplifier, an electrically charging switch for switching of electrically charging electric charges onto the respective capacitors or not, and an electrically discharging switch for switching or not electrically discharging electric charges from the respective capacitors or not. A switch device performs either one of the electrically charging, the electrically discharging, grounding, and polarity inversion onto the respective capacitors. A controller controls the electrically charging switch, the electrically discharging switch and the switch device to execute a process of second-order DWA algorithm for performing a second-order noise shaping of a non-linearity of the DA converter circuit.