Patents by Inventor Hao T. Nguyen
Hao T. Nguyen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11915758Abstract: Memory devices might include a first storage element, a second storage element, a data line, and a controller. The first storage element is to store a first data bit. The second storage element is to store a second data bit. The data line is selectively connected to the first storage element, the second storage element, and a memory cell. The controller is configured to apply one of four voltage levels to the data line based on the first data bit and the second data bit.Type: GrantFiled: January 10, 2023Date of Patent: February 27, 2024Assignee: Micron Technology, Inc.Inventors: Hao T. Nguyen, Tomoko Ogura Iwasaki, Erwin E. Yu, Dheeraj Srinivasan, Sheyang Ning, Lawrence Celso Miranda, Aaron S. Yip, Yoshihiko Kamata
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Patent number: 11875861Abstract: Sensing devices might include a first voltage node configured to receive a first voltage level, a second voltage node configured to receive a second voltage level lower than the first voltage level, a p-type field-effect transistor (pFET) selectively connected to a data line, and a sense node selectively connected to the pFET. The pFET might be connected between the first voltage node and the data line, between the second voltage node and the data line, and between the first voltage node and the data line. Memories might have controllers configured to cause the memories to determine whether a memory cell has an intended threshold voltage using similar sensing devices.Type: GrantFiled: November 4, 2022Date of Patent: January 16, 2024Assignee: Micron Technology, Inc.Inventors: Chang H. Siau, Hao T. Nguyen
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Publication number: 20230046283Abstract: Sensing devices might include a first voltage node configured to receive a first voltage level, a second voltage node configured to receive a second voltage level lower than the first voltage level, a p-type field-effect transistor (pFET) selectively connected to a data line, and a sense node selectively connected to the pFET. The pFET might be connected between the first voltage node and the data line, between the second voltage node and the data line, and between the first voltage node and the data line. Memories might have controllers configured to cause the memories to determine whether a memory cell has an intended threshold voltage using similar sensing devices.Type: ApplicationFiled: November 4, 2022Publication date: February 16, 2023Applicant: MICRON TECHNOLOGY, INC.Inventors: Chang H. Siau, Hao T. Nguyen
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Publication number: 20230039026Abstract: Memory devices might include a first latch to store a first data bit; a second latch to store a second data bit; a data line selectively connected to the first latch, the second latch, and a string of series-connected memory cells; and a controller configured to bias the data line during a programing operation of a selected memory cell. The controller may with the first data bit equal to 0 and the second data bit equal to 0, bias the data line to a first voltage level; with the first data bit equal to 1 and the second data bit equal to 0, bias the data line to a second voltage level; with the first data bit equal to 0 and the second data bit equal to 1, bias the data line to a third voltage level; and with the first data bit equal to 1 and the second data bit equal to 1, bias the data line to a fourth voltage level.Type: ApplicationFiled: August 9, 2021Publication date: February 9, 2023Applicant: MICRON TECHNOLOGY, INC.Inventors: Hao T. Nguyen, Tomoko Ogura Iwasaki, Erwin E. Yu, Dheeraj Srinivasan, Sheyang Ning, Lawrence Celso Miranda, Aaron S. Yip, Yoshihiko Kamata
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Patent number: 11562791Abstract: Memory devices might include a first latch to store a first data bit; a second latch to store a second data bit; a data line selectively connected to the first latch, the second latch, and a string of series-connected memory cells; and a controller configured to bias the data line during a programing operation of a selected memory cell. The controller may with the first data bit equal to 0 and the second data bit equal to 0, bias the data line to a first voltage level; with the first data bit equal to 1 and the second data bit equal to 0, bias the data line to a second voltage level; with the first data bit equal to 0 and the second data bit equal to 1, bias the data line to a third voltage level; and with the first data bit equal to 1 and the second data bit equal to 1, bias the data line to a fourth voltage level.Type: GrantFiled: August 9, 2021Date of Patent: January 24, 2023Assignee: Micron Technology, Inc.Inventors: Hao T. Nguyen, Tomoko Ogura Iwasaki, Erwin E. Yu, Dheeraj Srinivasan, Sheyang Ning, Lawrence Celso Miranda, Aaron S. Yip, Yoshihiko Kamata
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Patent number: 11508444Abstract: Sensing devices might include a first voltage node configured to receive a first voltage level, a second voltage node configured to receive a second voltage level lower than the first voltage level, a p-type field-effect transistor (pFET) selectively connected to a data line, and a sense node selectively connected to the pFET. The pFET might be connected between the first voltage node and the data line, between the second voltage node and the data line, and between the first voltage node and the data line. Memories might have controllers configured to cause the memories to determine whether a memory cell has an intended threshold voltage using similar sensing devices.Type: GrantFiled: March 12, 2021Date of Patent: November 22, 2022Assignee: Micron Technology, Inc.Inventors: Chang H. Siau, Hao T. Nguyen
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Publication number: 20220208283Abstract: Sensing devices might include a first voltage node configured to receive a first voltage level, a second voltage node configured to receive a second voltage level lower than the first voltage level, a p-type field-effect transistor (pFET) selectively connected to a data line, and a sense node selectively connected to the pFET. The pFET might be connected between the first voltage node and the data line, between the second voltage node and the data line, and between the first voltage node and the data line. Memories might have controllers configured to cause the memories to determine whether a memory cell has an intended threshold voltage using similar sensing devices.Type: ApplicationFiled: March 12, 2021Publication date: June 30, 2022Applicant: MICRON TECHNOLOGY, INC.Inventors: Chang H. Siau, Hao T. Nguyen