Abstract: An electrically-controllable color filter array based on a phase-change material, and an artificial vision system. The filter array includes a plurality of color filter units; each of the color filter units includes a metal layer, a bottom transparent conductive layer, a chalcogenide phase-change material layer, and a top transparent conductive layer; the red, green and blue filter function of each of the color filter units is adjusted according to the thickness of the bottom transparent conductive layer and the top transparent conductive layer; in the color filter units arranged in the array; the state transition of the chalcogenide phase-change material layer in each of the color filter units is realized by adjusting an electric pulse applied to the bit line and the word line where the electric pulse is present.

Abstract: The invention discloses a non-volatile memory cell based on a threshold switch and an operation method thereof, which belong to micro-nano electronics technology. The non-volatile memory cell includes a first metal electrode layer, a threshold switch layer, and a second metal electrode layer stacked in sequence. The threshold switch layer contains a chalcogenide semiconductor material, and the threshold voltage of the threshold switch layer is able to be switched between initial threshold voltage and high threshold voltage under the operation of an electric signal. The non-volatile memory cell realizes storage of information based on the threshold change controllable by the threshold switch. The advantages of such threshold switch lie in nanosecond-level switching speed, good scalability and easy three-dimensional stacking.

Abstract: Provided is a design method for a threshold switch device, a threshold switch device, and a dynamic memory, relating to the technical field of memories. The design method includes: testing a hold voltage, a low-resistance-state (LRS) resistance, and a threshold voltage of a threshold switch function layer; determining a target hold voltage of a threshold switch device according to the threshold voltage; determining a resistance sum of a top electrode and a bottom electrode of the threshold switch device according to the hold voltage and the LRS resistance of the threshold switch function layer and the target hold voltage of the threshold switch device; and selecting materials and thin film parameters of the top electrode and the bottom electrode according to the resistance sum of the top electrode and the bottom electrode of the threshold switch device, to design the threshold switch device meeting the target hold voltage.

Abstract: A selector with a superlattice-like structure and a preparation method thereof are provided, which belong to the technical field of micro-nano electronics. The selector includes a substrate, and a first metal electrode layer, a superlattice-like layer, and a second metal electrode layer sequentially stacked on the substrate. The superlattice-like layer includes n+1 first sublayers and n second sublayers alternately stacked periodically. A material of the first sublayer is amorphous carbon, and a material of the second sublayer is a chalcogenide with gating property.

Abstract: The invention relates to a virtual reality display device based on phase change materials, which has characteristics of a high resolution, a large color gamut and a high frame rate, and can provide a more real and vivid virtual reality experience. The display technology mainly includes a backlight emitting component, a quantum dot excitation layer, an all-dielectric phase change filter structure, an optical lens, a reflection mirror and a device cover. The backlight emitting component comprises an LED excitation light source and a diffusion plate for generating and dispersing light. The virtual reality display technology based on phase change materials has a wide application prospect. In addition to being used in virtual reality devices such as VR headsets, it can also be used in augmented reality devices such as AR glasses. When implemented, it can be designed and adjusted according to actual needs to provide a best user experience.

Abstract: The invention relates to a pixel grayscale modulation structure based on phase change materials, which has characteristics of a high grayscale level, a high light utilization rate, a fast response speed and a high resolution. It mainly includes n multi-layer phase change unit arrays in each sub-pixel, an upper all-dielectric filter structure, an all-dielectric intermediate cavity, a lower all-dielectric filter structure, a crossbar control structure, which is suitable for various display devices, including but not limited to electronic paper, projection devices, augmented reality/virtual reality equipment (AR/VR), vehicle display, mobile device display, and the like.

Abstract: The disclosure belongs to the field of microelectronics, and specifically, relates to a method of inducing crystallization of a chalcogenide phase-change material and application thereof. To be specific, a dielectric material is brought into contact with an interface of the chalcogenide phase-change material. The dielectric material is in an octahedral configuration, and the dielectric material provides a crystal nucleus growth center for the crystallization of the chalcogenide phase-change material at the interface between the two, so as to induce the phase-change material to accelerate the crystallization. The method is further applied in a phase-change memory cell. Among all the dielectric material layers in contact with the chalcogenide phase-change material layer, the dielectric material structure of at least one side of the dielectric material layer is an octahedral configuration.

Abstract: The invention discloses a three-dimensional 1S1C memory based on a ring capacitor and a preparation method. The memory includes: a horizontal peripheral electrode layer including a first dielectric layer and a first metal electrode layer alternately stacked and grown on a substrate and provided with trenches penetrating in a vertical direction and holes penetrating in the vertical direction, a vertical functional layer, and a capacitive dielectric layer. An annular groove is disposed outside each hole. The annular groove surrounds the holes and vertically cuts off the peripheral electrode layer. The annular groove is evenly filled with a capacitive dielectric layer. A top of the second metal electrode layer is extended to a surface of a topmost first dielectric layer to form a bit line electrode and is connected to a bit line. A region where the second metal electrode layer faces the first metal electrode layer forms a memory cell.

Abstract: An information configuration method, a domain name resolution method, an electronic device, and a storage medium are disclosed. The method may include determining a user privacy masking indication; and transmitting the user privacy masking indication to a second node, such that the second node masks user privacy information carried during a domain name resolution according to the user privacy masking indication.

Abstract: A management method for Content Delivery Network (CDN) function virtualization, including: sending a node creation request to a Mobile/Multi-access Edge Application Orchestrator (MEAO), so that the MEAO controls a Mobile/Multi-access Edge computing Platform (MEP) to perform node instantiation processing to generate a Mobile/Multi-access Edge Computing-CDN (MEC-CDN) node, wherein the MEC-CDN node includes at least one virtualization function module that supports a service operation, and the virtualization function module accesses a storage resource pool via a unified storage access interface provided by a storage resource management module (S101); and connecting the MEC-CDN node to a CDN (S102). Further provided are a CDN management node, an MEAO, an MEP, an electronic device, and a computer readable medium.

Abstract: The invention discloses a three-dimensional 1S1C memory based on a ring capacitor and a preparation method. The memory includes: a horizontal peripheral electrode layer including a first dielectric layer and a first metal electrode layer alternately stacked and grown on a substrate and provided with trenches penetrating in a vertical direction and holes penetrating in the vertical direction, a vertical functional layer, and a capacitive dielectric layer. An annular groove is disposed outside each hole. The annular groove surrounds the holes and vertically cuts off the peripheral electrode layer. The annular groove is evenly filled with a capacitive dielectric layer. A top of the second metal electrode layer is extended to a surface of a topmost first dielectric layer to form a bit line electrode and is connected to a bit line. A region where the second metal electrode layer faces the first metal electrode layer forms a memory cell.

Abstract: Disclosed are an OTS-based dynamic storage structure and an operation method thereof. The OTS-based dynamic storage structure includes a plurality of storage units distributed in an array, and each storage unit includes an OTS gating transistor and a storage capacitor. The OTS gating transistor has two states, namely, high resistance state and low resistance state. When the voltage across the OTS gating transistor exceeds the threshold voltage Vth, the OTS gating transistor is switched from the high resistance state to the low resistance state. When the voltage across the OTS gating transistor in the low resistance state is lower than the holding voltage Vhold, the OTS gating transistor is switched from the low resistance state to the high resistance state.

Abstract: In an example embodiment, content understanding/embeddings are obtained for content of multiple different content types, using a generative artificial intelligence (GAI) model, and then those content understanding/embeddings can be utilized to match content across content type. In such embodiments, the embeddings may be used as input to a separately trained machine learning model that is designed to provide a similarity score between two different pieces of content, even when those two different pieces are of two different content types.

Abstract: Disclosed are an OTS-based dynamic storage structure and an operation method thereof. The OTS-based dynamic storage structure includes a plurality of storage units distributed in an array, and each storage unit includes an OTS gating transistor and a storage capacitor. The OTS gating transistor has two states, namely, high resistance state and low resistance state. When the voltage across the OTS gating transistor exceeds the threshold voltage Vth, the OTS gating transistor is switched from the high resistance state to the low resistance state. When the voltage across the OTS gating transistor in the low resistance state is lower than the holding voltage Vhold, the OTS gating transistor is switched from the low resistance state to the high resistance state.

Abstract: The disclosure belongs to the field of micro-nano electronic materials, and in particular to a Se-based selector material, a selector unit, and a preparation method thereof. The Se-based selector material is a compound including Ge, Se, and B elements. The chemical formula of the Se-based selector material is (GexSe1?x)1?yByMz, in which the M element is at least one of In, Ga, Al, and Zn, and 0.1?x?0.9, 0.02?y?0.15, and 0?z?0.2. The problems of safety and stability of the existing material selection for the selector are solved by the selector material, the selector unit, and the preparation method thereof provided by the disclosure. In addition, the threshold voltage of the selector device prepared based on the Se-based selector material is adjustable, and the comprehensive performance is good.

Abstract: This application provides a phase change material. The phase change material comprises a hafnium-containing material, the hafnium-containing material is formed by doping hafnium-containing or a hafnium-containing compound to a parent material, and the parent material comprises a compound that is formed by tellurium and at least one of germanium, antimony, and bismuth and that can perform a phase change.

Abstract: A method for operating a dynamic memory is provided, and the method includes the following steps. A refresh operation is performed on the dynamic memory according to predetermined interval time T, an operation command is received in real time at the same time, a read operation is performed on a selected memory cell according to position information of the selected memory cell in the operation command when the operation command is received, and state data read in the read operation is temporarily stored in a read buffer. The interval time T is less than time t required for a voltage value of a capacitor in the memory cell to drop to a critical capacitor voltage value for the read operation to correctly read the state data of the memory cell during a write operation. According to operation command type information in the operation command, corresponding operations are performed on the selected memory cell.

Abstract: A method for operating a dynamic memory is provided, and the method includes the following steps. A refresh operation is performed on the dynamic memory according to predetermined interval time T, an operation command is received in real time at the same time, a read operation is performed on a selected memory cell according to position information of the selected memory cell in the operation command when the operation command is received, and state data read in the read operation is temporarily stored in a read buffer. The interval time T is less than time t required for a voltage value of a capacitor in the memory cell to drop to a critical capacitor voltage value for the read operation to correctly read the state data of the memory cell during a write operation. According to operation command type information in the operation command, corresponding operations are performed on the selected memory cell.

Abstract: The disclosure discloses a three-dimensional (3D) convolution operation device and method based on a 3D phase change memory, which includes a 3D phase change memory, an input control module, a setting module, and an output control module. By using the 3D phase change memory to perform 3D convolution operation, the phase change units on the same bit line constitute a convolution kernel. Based on the multilayer stack structure, the upper and lower electrodes of the 3D phase change memory serve as the information input terminal, and they are convolved after passing through the respective phase change unit arrays, and the result of the convolution operation is superposed on the middle electrode in the form of current, thereby obtaining the sum of the convolution calculation results of the input information of the upper and lower electrodes, such that the 3D convolution operation is completed in one step.

Abstract: Disclosed are an information processing method, an intermediate resolver, a network device and a non-transitory computer-readable storage medium. The information processing method may include: receiving first Domain Name System (DNS) request information; obtaining, according to the first DNS request information, second DNS request information comprising ciphertext sensitive information and first ciphertext marking information for indicating the ciphertext sensitive information being ciphertext information; and sending the second DNS request information to an authoritative DNS server, so that the authoritative DNS server performs information processing according to the ciphertext sensitive information and the first ciphertext marking information.