Abstract: The present disclosure is related to a display device. The display device includes a middle frame, a display panel and a supporting member. The middle frame is provided with a first mating surface. The display panel includes a display substrate and a cover plate. A first notch is provided at a side of an edge of the cover plate close to the first mating surface. The first notch extends along a thickness direction of the cover plate. An orthographic projection of the display substrate on the cover plate at least partially overlaps an orthographic projection of the first mating surface on the cover plate. The supporting member includes a first supporting section and a second supporting section, the first supporting section is connected to the first mating surface, and the second supporting section is partially arranged in the first notch.

Abstract: Two-dimensional (2D) materials formed in very thin layers improve the operation of semiconductor devices. However, forming a contact on 2D material tends to damage and penetrate the 2D material. A relatively gentle etch process has been developed that is very selective to the 2D material and allows vertical holes to be etched down to the 2D material without damaging or penetrating the 2D material. A low-power deposition process forms a protective liner when performing the metal fill to further prevent damage to the 2D material when forming the metal contacts in the holes. These processes allow a vertical metal contact to be formed on a planar 2D material or a vertical sidewall contact be formed in a 3D NAND without damaging the 2D material. This increases the contact area, reduces the contact resistance, and improves the performance of the 2D material in the device.

Abstract: A method of forming a semiconductor structure includes forming a fin structure having a stack of alternating first semiconductor layers and second semiconductor layers over a substrate, forming cladding layers along sidewalls of the fin structure, forming a dummy gate stack over the cladding layers, and forming source/drain (S/D) features in the fin structure and adjacent to the dummy gate stack. The method further includes removing the dummy gate stack to form a gate trench adjacent to the S/D features, removing the cladding layers to form first openings along the sidewalls of the fin structure, where the first openings extend to below the stack, removing the first semiconductor layers to form second openings between the second semiconductor layers and adjacent to the first openings, and subsequently forming a metal gate stack in the gate trench, the first openings, and the second openings.

Abstract: A display panel, a method for manufacturing the same, a display device and a method for manufacturing the same are provided. The display panel includes a display region and a peripheral region arranged on a substrate, and further includes multiple active driving circuits and multiple redundant driving circuits. At least one active driving circuit is electrically connected to at least one of multiple pixel units, and each redundant driving circuit includes at least one electrode layer arranged on the substrate. The peripheral region includes a flat region and a curved region, at least part of the redundant driving circuits are located in a flat redundant driving circuit region included in the flat region. The flat redundant driving circuit region includes at least two alignment mark regions. In the alignment mark regions, at least one electrode layer is hollowed out, and/or at least one electrode layer is filled up.

Abstract: A semiconductor package includes a substrate; a die mounted on a top surface of the substrate in a flip-chip fashion; and a lid mounted on the die and on a perimeter of the substrate. The lid includes a cover plate and four walls formed integral with the cover plate. A liquid-cooling channel is situated between the cover plate of the lid and a rear surface of the die for circulating a coolant relative to the semiconductor package.

Abstract: A backlight module includes a light guide plate, a light source, a first prism sheet, and a second prism sheet. The light source is disposed on a light incident surface of the light guide plate. The first prism sheet is disposed on a side of a light exiting surface of the light guide plate and has multiple first prism structures facing the light guide plate. The second prism sheet has multiple second prism structures facing the light guide plate. An included angle between an extending direction of the first prism structures and an extending direction of the second prism structures is greater than or equal to 85 degrees and less than or equal to 95 degrees. An included angle between the extending direction of the second prism structures and the light incident surface is greater than or equal to 85 degrees and less than or equal to 95 degrees.

Abstract: A method for forming a semiconductor device includes receiving a substrate having a first opening and a second opening formed thereon, wherein the first opening has a first width, and the second opening has a second width less than the first width; forming a protecting layer to cover the first opening and expose the second opening; performing a wet etching to widen the second opening with an etchant, wherein the second opening has a third width after the performing of the wet etching, and the third width of the second opening is substantially equal to the first width of the first opening; and performing a photolithography to transfer the first opening and the second opening to a target layer.

Abstract: Disclosed is a power unit used for a swimming pool cleaning machine and the swimming pool cleaning machine. The power unit includes an impeller and a water outlet channel communicated with the impeller. The water outlet channel includes a spiral portion, a linear flowing portion and a water outlet. The inlet of the impeller is communicated with a water, and the outlet of the impeller is communicated with the spiral portion. The linear flowing portion deflects to the outer side of the spiral direction of the spiral portion. A steering stressed portion is formed at the junction of the linear flowing portion and the spiral portion. The steering stressed portion and the spiral portion are respectively located on either sides of the center line of the water outlet. The water outlet direction of the water outlet is opposite to the traveling direction of the swimming pool cleaning machine.

Abstract: The disclosure provides a method, a device, an apparatus, and a storage medium for identifying a type of atmospheric aerosol. The method includes: determining a depolarization ratio and an aerosol extinction coefficient of an atmospheric area to be identified according to a lidar signal and a relative humidity profile of the area; identifying a cloud type of the area according to the signal and the profile; and identifying a type of an atmospheric aerosol in the area based on the cloud type, the ratio and the coefficient. Relevant values are calculated based on lidar signals and the profile, clouds are identified first, and then different types of aerosols are further distinguished in combination with the relevant values, and a numerical determination standard is given to synchronously identify different types of aerosols including types of cloud, fog and other particulates in the atmosphere, thereby improving accuracy of identification.

Abstract: A packaging method, includes: providing a continuous multi-package structure, which includes a lead frame and a molding layer formed on the lead frame, wherein the lead frame includes a plurality of recesses formed on a bottom surface on a side of the lead frame opposite to the molding layer; forming a coating layer on the bottom surface, to cover the bottom surface and the recesses on the bottom surface; and mechanically cutting the continuous multi-package structure through the recesses, to separately form a plurality of packaging units, wherein in each of the packaging units, an exposed portion of the lead frame exposed in the recesses includes a step shape.

Abstract: A developing cartridge includes a casing configured to accommodate developer and having a first side and a second side oppositely arranged in a first direction, and a third side and a fourth side oppositely arranged in the second direction, the first direction and the second direction being intersected with each other. The developing cartridge further includes a developing roller, positioned at the third side, for rotating around a first axis extending in the first direction; a coupling, positioned at the first side, for receiving driving-force output from an image forming device to rotate; a driving surface, inclined to the first direction, including a first driving surface and a second driving surface; a detected part, at least partially positioned at the second side, for moving according to rotation of the coupling.

Abstract: A memory device is provided. The memory device includes a memory cell array having a plurality of memory cells arranged in a matrix of a plurality of rows and a plurality of columns. Each of the plurality of columns include a first plurality of memory cells connected to a first bit line and a second bit line. A pre-charge circuit is connected to the memory cell array. The pre-charge circuit pre-charges each of the first bit line and the second bit line from a first end. A pre-charge assist circuit is connected to the memory cell array. The pre-charge assist circuit pre-charges each of the first bit line and the second bit line from a second end, the second end being opposite the first end.

Abstract: A semiconductor structure includes a stack of semiconductor layers disposed over a protruding portion of a substrate, isolation features disposed over the substrate, wherein a top surface of the protruding portion of the substrate is separated from a bottom surface of the isolation features by a first distance, a metal gate stack interleaved with the stack of semiconductor layers, where a bottom portion of the metal gate stack is disposed on sidewalls of the protruding portion of the substrate and where thickness of the bottom portion of the metal gate stack is defined by a second distance that is less than the first distance, and epitaxial source/drain features disposed adjacent to the metal gate stack.

Abstract: A method includes providing a substrate, a dummy fin, and a stack of semiconductor channel layers; forming an interfacial layer wrapping around each of the semiconductor channel layers; depositing a high-k dielectric layer, wherein a first portion of the high-k dielectric layer over the interfacial layer is spaced away from a second portion of the high-k dielectric layer on sidewalls of the dummy fin by a first distance; depositing a first dielectric layer over the dummy fin and over the semiconductor channel layers, wherein a merge-critical-dimension of the first dielectric layer is greater than the first distance thereby causing the first dielectric layer to be deposited in a space between the dummy fin and a topmost layer of the stack of semiconductor channel layers, thereby providing air gaps between adjacent layers of the stack of semiconductor channel layers and between the dummy fin and the stack of semiconductor channel layers.

Abstract: Methods for forming patterned multi-layer stacks including a metal-containing layer are provided herein. Methods involve using silicon-containing non-metal materials in a multi-layer stack including one sacrificial layer to be later removed and replaced with metal while maintaining etch contrast to pattern the multi-layer stack and selectively remove the sacrificial layer prior to depositing metal. Methods involve using silicon oxycarbide in lieu of silicon nitride, and a sacrificial non-metal material in lieu of a metal-containing layer, to fabricate the multi-layer stack, pattern the multi-layer stack, selectively remove the sacrificial non-metal material to leave spaces in the stack, and deposit metal-containing material into the spaces. Sacrificial non-metal materials include silicon nitride and doped polysilicon, such as boron-doped silicon.

Abstract: The present disclosure describes a signal transmission device based on molded interconnect device and laser direct structuring (MID/LDS) technology, comprising: a shielding shell (1); and a photoelectric conversion module (2), which includes a carrier (21), an electrical module (22) and an optical module (23). The photoelectric conversion module (2) is fixed inside the shielding shell (1), wherein the first recessed structure (201) accommodates a driving chip (211), a photoelectric conversion chip (212) and an optical module (23), and the second recessed structure (202) accommodates an electrical module (22), the driving chip (211), the photoelectric conversion chip (212) and the conductive terminal (215) are electrically connected to each other, and the carrier (21) is designed by integral molding based on the MID/LDS technology. In t present disclosure, the design space in the shielding shell can be effectively saved.

Abstract: A curved substrate bubble detection method includes: providing, by a first light source and a second light source, parallel light incident to a to-be-tested substrate in different incident directions; obtaining, by a linear array camera, a first image including image information of a first side edge of the to-be-tested substrate; determining location information of a defect region of the to-be-tested substrate according to the first image, and generating a second image including image information of the defect region; binarizing the second image, and determining that the to-be-tested substrate has a bubble defect if there are at least two bright spots in an obtained binarized image, and a distance between any two first bright spots of at least two first bright spots is less than a first preset value. A curved substrate bubble detection system is also disclosed.

Abstract: A semiconductor device includes a first gate stack structure over a substrate, a source/drain epitaxial layer, a lightly doped region, and a silicide region. The source/drain epitaxial layer is disposed in the substrate and adjacent to the first gate stack structure. The lightly doped region is located in the substrate to be electrically connected to the source/drain epitaxial layer. The lightly doped region includes a first portion protrudes from a sidewall of the source/drain epitaxial layer. The silicide region is in contact with a top surface and sidewalls of a top portion of the source/drain epitaxial layer and a top surface of the first portion of the lightly doped region. The top portion of the source/drain epitaxial layer is higher than the top surface of the first portion of the lightly doped region.

Abstract: A method includes performing a fabrication process that fabricates a wafer having an upper region and unit areas arranged in rows along a first direction and columns along an orthogonal second direction and respective scribe streets between adjacent unit areas to: form first and second electrical components on or in the upper region in respective unit areas or scribe streets, the first and second electrical components spaced apart from one another and including structural features with different respective first and second spacing distances along the first direction.

Abstract: A semiconductor device according to the present disclosure includes a gate extension structure, a first source/drain feature and a second source/drain feature, a vertical stack of channel members extending between the first source/drain feature and the second source/drain feature along a direction, and a gate structure wrapping around each of the vertical stack of channel members. The gate extension structure is in direct contact with the first source/drain feature.