Patents by Inventor Hao-Yun Chen

Hao-Yun Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230306083
    Abstract: A prediction engine predicts the performance of a neural network model executed on a hardware platform. The neural network model is compiled for the hardware platform. The neural network model includes multiple layers and each layer is defined by a set of operations and corresponding configuration settings of the operations. For each layer, the prediction engine performs feature embedding on the set of operations and the corresponding configuration settings to generate a feature embedded sequence of categorical feature vectors and numerical feature vectors. Positional encoding and a series of attention functions are applied on the feature embedded sequence to generate an encoded sequence. The prediction engine reduces the dimensions of the encoded sequence to output a performance metric of executing the neural network model on the hardware platform.
    Type: Application
    Filed: March 23, 2022
    Publication date: September 28, 2023
    Inventor: Hao-Yun Chen
  • Publication number: 20230064692
    Abstract: According to a network space search method, an expanded search space is partitioned into multiple network spaces. Each network space includes a plurality of network architectures and is characterized by a first range of network depths and a second range of network widths. The performance of the network spaces is evaluated by sampling respective network architectures with respect to a multi-objective loss function. The evaluated performance is indicated as a probability associated with each network space. The method then identifies a subset of the network spaces that has the highest probabilities, and selects a target network space from the subset based on model complexity.
    Type: Application
    Filed: June 22, 2022
    Publication date: March 2, 2023
    Inventors: Hao Yun Chen, Min-Hung Chen, Min-Fong Horng, Yu-Syuan Xu, Hsien-Kai Kuo, Yi-Min Tsai
  • Publication number: 20230006611
    Abstract: A compensator compensates for the distortions of a power amplifier circuit. A power amplifier neural network (PAN) is trained to model the power amplifier circuit using pre-determined input and output signal pairs that characterize the power amplifier circuit. Then a compensator is trained to pre-distort a signal received by the PAN. The compensator uses a neural network trained to optimize a loss between a compensator input and a PAN output, and the loss is calculated according to a multi-objective loss function that includes one or more time-domain loss function and one or more frequency-domain loss functions. The trained compensator performs signal compensation to thereby output a pre-distorted signal to the power amplifier circuit.
    Type: Application
    Filed: July 4, 2022
    Publication date: January 5, 2023
    Inventors: Po-Yu Chen, Hao Chen, Yi-Min Tsai, Hao Yun Chen, Hsien-Kai Kuo, Hantao Huang, Hsin-Hung Chen, Yu Hsien Chang, Yu-Ming Lai, Lin Sen Wang, Chi-Tsan Chen, Sheng-Hong Yan
  • Publication number: 20220015627
    Abstract: Disclosed relates to a method and system of determining and recording eye motions. It is a distance measuring photoelectric proximity sensor fixed to the head, which senses the change in distance between the sensor and the eye when the eyelid is opening and closing to detect the eye open and close motion; with its small size and power saving features, it can be used as a head-mounted device for real-time management and long-term recording of eye usage, and is applied to human-machine interfaces to transmit signals generated by user's eye motions to control external components.
    Type: Application
    Filed: June 30, 2021
    Publication date: January 20, 2022
    Inventor: Hao-yun Chen
  • Patent number: 7247922
    Abstract: An inductive device including an inductor coil located over a substrate, at least one electrically insulating layer interposing the inductor coil and the substrate, and a plurality of current interrupters each extending into the substrate, wherein a first aggregate outer boundary of the plurality of current interrupters substantially encompasses a second aggregate outer boundary of the inductor coil.
    Type: Grant
    Filed: September 24, 2004
    Date of Patent: July 24, 2007
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Andrew Yeh, Alex Chang, Sung-Pi Tseng, Chang-Yun Chang, Hao-Yun Chen, Fu-Liang Yang