Abstract: A data decoder decoding an input signal, comprising a comparator, a converter, and a data check module. The comparator compares the input signal with a threshold level to generate first data, such that each bit of the first data is one of two possible states, and identifies an ambiguous bit of the first data in an ambiguous range. The converter coupled to the comparator converts the first data to parallel. The data check module coupled to the converter evaluates whether the first data is inaccurate according to an error checking code thereof, and changes the ambiguous bit to the other possible state, if the first data is inaccurate. The ambiguous range includes the threshold level.