Patents by Inventor Haojie Zheng

Haojie Zheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • OPTOCOUPLER, LEAD FRAME AND MANUFACTURING METHOD THEREFOR
    Publication number: 20240162124
    Abstract: A lead frame for an optocoupler is provided, which is a metal sheet and includes multiple frame units and multiple mutually parallel connecting strips. The frame units are arranged at intervals on each of the connecting strips. Each of the frame units includes two adjacent functional parts, and two pins perpendicularly connected to the connecting strip. The two functional parts are both located on one side of the connecting strip and are respectively connected to the two pins and ends of the two pins are located on the other side of the connecting strip. The area of each of the functional parts is sufficient to accommodate a chip to be installed and fixed, and the chip is any one of a light-emitting chip and a light-sensing chip.
    Type: Application
    Filed: November 15, 2023
    Publication date: May 16, 2024
    Applicant: FOSHAN NATIONSTAR OPTOELECTRONICS CO., LTD.
    Inventors: Mingjun ZHU, Yurong LI, Haojie GUO, Xiaopeng YU, Huijuan LIU, Yinling ZHENG
  • Ladder logic graphical programming and textual programming synchronization
    Patent number: 10345784
    Abstract: For ladder logic graphical programming and textual programming synchronization, a processor dynamically synchronizes a graphical ladder logic programming interface to an executable code base of ladder logic instructions. The processor further concurrently dynamically synchronizes a textual ladder logic programming interface to the executable code base.
    Type: Grant
    Filed: September 6, 2017
    Date of Patent: July 9, 2019
    Assignee: Rockwell Automation Technologies, Inc.
    Inventors: Adarsh Bhat, Jean-Sebastien Kovacs, Haojie Zheng, Pujianto Cemerlang, Thomas Sugimoto
  • LADDER LOGIC GRAPHICAL PROGRAMMING AND TEXTUAL PROGRAMMING SYNCHRONIZATION
    Publication number: 20190072929
    Abstract: For ladder logic graphical programming and textual programming synchronization, a processor dynamically synchronizes a graphical ladder logic programming interface to an executable code base of ladder logic instructions. The processor further concurrently dynamically synchronizes a textual ladder logic programming interface to the executable code base.
    Type: Application
    Filed: September 6, 2017
    Publication date: March 7, 2019
    Inventors: Adarsh Bhat, Jean-Sebastien Kovacs, Haojie Zheng, Pujianto Cemerlang, Thomas Sugimoto