Patents by Inventor Haoping Xu

Haoping Xu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250259264
    Abstract: Certain aspects of the present disclosure provide techniques and apparatus for efficient scaling of inputs to be processed by a machine learning model. An example method generally includes receiving, by a machine learning model, an input having a starting size in a plurality of dimensions. The method further includes scaling, by the machine learning model, the input in one or more dimensions of the plurality of dimensions to generate a scaled input, wherein the input is scaled in each respective dimension of the one or more dimensions based on a respective stride length determined based on a starting size in the respective dimension and a target size in the respective dimension, and the respective stride length associated with at least one dimension in the one or more dimensions comprises a non-integer value. The method further includes generating, by the machine learning model, an inference based on the scaled input.
    Type: Application
    Filed: February 13, 2024
    Publication date: August 14, 2025
    Inventors: Haoping XU, Prajakt KULKARNI, Suze BALATSOS, Neelkanth Pradhumanbhai PATEL, Sheng ZHAN, Brian VARGA
  • Publication number: 20250119159
    Abstract: Systems and techniques are provided for compressing data. A process can include generating a compressed sub-packet by removing one or more sparsity bytes from a sequence of values corresponding to a sub-packet, the sequence of values including one or more sparsity bytes each equal to a configured sparsity value and one or more non-sparsity bytes each corresponding to a respective data value different from the configured sparsity value. A sub-packet header can be generated for the compressed sub-packet, and indicative of a respective location within the sequence of values of each non-sparsity byte. A packet header can be generated for a plurality of compressed sub-packets, and indicative of the configured sparsity value and respective coding information for each compressed sub-packet. A compressed data packet can be generated to include at least the packet header, the sub-packet header, and the one or more non-sparsity bytes included in the sequence of values.
    Type: Application
    Filed: October 15, 2024
    Publication date: April 10, 2025
    Inventors: Haoping XU, Prajakt KULKARNI, Suze BALATSOS, Zhaohui DU, Shiqi SUN, Xiaoxuan YU, Nanda Kumar ASWATHA KUMAR, Sheng ZHAN
  • Patent number: 12254405
    Abstract: Technologies are provided for processing data in neural networks. An example method can include processing, by each layer of a neural network, a row in a first stripe of a data input, the row being processed sequentially in a horizontal direction and according to a layer-by-layer sequence; after processing the row, processing, by each layer, subsequent rows in the first stripe on a row-by-row basis, each subsequent row being processed sequentially in the horizontal direction and according to the layer-by-layer sequence; generating an output stripe based on the processing of the row and subsequent rows; processing, by each layer, a second stripe of the data input, each row in the second stripe being processed in the horizontal direction and according to the layer-by-layer sequence, wherein rows in the second stripe are processed on a row-by-row basis; and generating another output stripe based on the processing of the second stripe.
    Type: Grant
    Filed: March 12, 2021
    Date of Patent: March 18, 2025
    Assignee: QUALCOMM INCORPORATED
    Inventors: David Hansen, Alireza Shoa Hassani Lashdan, Sivakumar Chidambaram, Haoping Xu, Jeffrey Kar Fai Wong, Stone Yun, Darren Gnanapragasam
  • Publication number: 20240420276
    Abstract: Systems and techniques are provided for processing image data. A respective first value enclosed by a convolution kernel in each position of a plurality of positions of the convolution kernel along a row of the image data can be obtained and stored using a respective memory location associated with each position of the plurality of positions. Based on each respective first value, an accumulated value corresponding to a convolution output for each position of the plurality of positions can be updated. A plurality of second values enclosed by the convolution kernel in each position of the plurality of positions can be obtained. The plurality of second values includes a subset of the respective first values and an additional second value. A memory location used to store a first value not included in the plurality of second values can be updated to store the additional second value.
    Type: Application
    Filed: June 15, 2023
    Publication date: December 19, 2024
    Inventors: Haoping XU, Suze BALATSOS, Prajakt KULKARNI, Brian VARGA, Nikolina ASKOVIC, Aranksha Normanbhai PATEL, Anam ZAIN, Darwin FAN, Neelkanth Pradhumanbhai PATEL, Manoj SHOKEEN
  • Patent number: 12132502
    Abstract: Systems and techniques are provided for compressing data. A process can include generating a compressed sub-packet by removing one or more sparsity bytes from a sequence of values corresponding to a sub-packet, the sequence of values including one or more sparsity bytes each equal to a configured sparsity value and one or more non-sparsity bytes each corresponding to a respective data value different from the configured sparsity value. A sub-packet header can be generated for the compressed sub-packet, and indicative of a respective location within the sequence of values of each non-sparsity byte. A packet header can be generated for a plurality of compressed sub-packets, and indicative of the configured sparsity value and respective coding information for each compressed sub-packet. A compressed data packet can be generated to include at least the packet header, the sub-packet header, and the one or more non-sparsity bytes included in the sequence of values.
    Type: Grant
    Filed: October 9, 2023
    Date of Patent: October 29, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Haoping Xu, Prajakt Kulkarni, Suze Balatsos, Zhaohui Du, Shiqi Sun, Xiaoxuan Yu, Nanda Kumar Aswatha Kumar, Sheng Zhan
  • Patent number: 11757469
    Abstract: Various embodiments include methods and devices for compression and decompression of weight data sets. Some embodiments may include compressing weight data by receiving a weight data set of binary numbers representing weight values, generating a frame payload including a compressed first frame of a first subset of the weight values in the weight data set, and generating a block of compressed weight data having the frame payload. Some embodiments may include decompressing weight data by retrieving a block of compressed weight data, in which the block of compressed weight data includes a frame header associated with a frame payload, in which the frame header includes a normalization factor indicator, and in which the frame payload includes compressed weight values, and generating a first decompressed frame comprising decompressed weight values of the compressed weight values of the frame payload.
    Type: Grant
    Filed: April 1, 2021
    Date of Patent: September 12, 2023
    Assignee: QUALCOMM Incorporated
    Inventors: Prajakt Kulkarni, Lakshmi Narayana Macha, Haoping Xu
  • Publication number: 20220321143
    Abstract: Various embodiments include methods and devices for compression and decompression of weight data sets. Some embodiments may include compressing weight data by receiving a weight data set of binary numbers representing weight values, generating a frame payload including a compressed first frame of a first subset of the weight values in the weight data set, and generating a block of compressed weight data having the frame payload. Some embodiments may include decompressing weight data by retrieving a block of compressed weight data, in which the block of compressed weight data includes a frame header associated with a frame payload, in which the frame header includes a normalization factor indicator, and in which the frame payload includes compressed weight values, and generating a first decompressed frame comprising decompressed weight values of the compressed weight values of the frame payload.
    Type: Application
    Filed: April 1, 2021
    Publication date: October 6, 2022
    Inventors: Prajakt Kulkarni, Lakshmi Narayana Macha, Haoping Xu
  • Publication number: 20220292344
    Abstract: Technologies are provided for processing data in neural networks. An example method can include processing, by each layer of a neural network, a row in a first stripe of a data input, the row being processed sequentially in a horizontal direction and according to a layer-by-layer sequence; after processing the row, processing, by each layer, subsequent rows in the first stripe on a row-by-row basis, each subsequent row being processed sequentially in the horizontal direction and according to the layer-by-layer sequence; generating an output stripe based on the processing of the row and subsequent rows; processing, by each layer, a second stripe of the data input, each row in the second stripe being processed in the horizontal direction and according to the layer-by-layer sequence, wherein rows in the second stripe are processed on a row-by-row basis; and generating another output stripe based on the processing of the second stripe.
    Type: Application
    Filed: March 12, 2021
    Publication date: September 15, 2022
    Inventors: David HANSEN, Alireza SHOA HASSANI LASHDAN, Sivakumar CHIDAMBARAM, Haoping XU, Jeffrey Kar Fai WONG, Stone YUN, Darren GNANAPRAGASAM
  • Patent number: 11029745
    Abstract: Systems and methods are disclosed method for controlling instantaneous current changes in parallel processors with arrays of parallel computing elements, such as neural processors. An exemplary method comprises monitoring the array of computing elements and determining a transition from a first activity level of the array to a second activity level of the array, such as an idle-to-active or active-to-idle transition. Once a transition is determined, the array is selectively controlled to minimize the instantaneous current change from the transition from the first activity level to the second activity level.
    Type: Grant
    Filed: November 8, 2018
    Date of Patent: June 8, 2021
    Assignee: QUALCOMM Incorporated
    Inventors: Kyle Ernewein, Jason Edward Podaima, Francisco Perez, John Daniels, Alex Miler, Jeffrey Gemar, Rexford Alan Hill, Haoping Xu
  • Publication number: 20180048817
    Abstract: Methods and apparatus improve static region detection in an imaging pipeline. An imaging pipeline may perform detection of static regions of an image at multiple stages of the pipeline. For example, as static regions may be eliminated from further processing by the imaging pipeline, static region detection performed at an early stage of the pipeline may provide for maximized power savings. As images early in the pipeline may contain artifacts inhibiting detection of some static regions, additional static region detection may be performed after further image processing. For example, static region detection may be performed for a second time after some filtering is applied to images in the pipeline. Regions previously characterized as dynamic may be characterized as static later in the pipeline due to a reduction of noise for example provided by the filters, and differences between the static region detection at different positions within the imaging pipeline.
    Type: Application
    Filed: August 15, 2016
    Publication date: February 15, 2018
    Inventors: Suolong Dong, Scott Cheng, Jeffrey Chu, Neil Christanto, Joseph Cheung, Michael Lee Coulter, Chia-Yuan Teng, Haoping Xu