Patents by Inventor Haoran SHI

Haoran SHI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240101882
    Abstract: The following is directed to an abrasive particle having a body including a core and a coating overlying at least a portion of the core. The coating can include a content of lithium. In an embodiment, the coating can further include silicon, oxygen, or a combination thereof.
    Type: Application
    Filed: September 22, 2023
    Publication date: March 28, 2024
    Inventors: Zehua SHI, Daming LI, Xiaochao SONG, Jianfeng ZHANG, Haoran NIU, Benjamin LEVEILLE, Melissa BECKER, Zhenyu LUO, Aiyun LUO
  • Patent number: 10535803
    Abstract: A light-emitting diode includes, a semiconductor stack including a first semiconductor layer, a second semiconductor layer, and an active layer. The light-emitting diode also includes a transparent conductive layer including a first transparent conductive layer disposed on the second semiconductor layer and a second transparent conductive layer disposed on the first transparent conductive layer. The second transparent conductive layer has a conductivity different than the first transparent conductive layer.
    Type: Grant
    Filed: June 12, 2018
    Date of Patent: January 14, 2020
    Assignee: Seoul Semiconductor Co., Ltd.
    Inventors: Chan Seob Shin, Hyoung Jin Lim, Kyoung Wan Kim, Yeo Jin Yoon, Jacob J Richardson, Daniel Estrada, Evan C. O'Hara, Haoran Shi
  • Publication number: 20180294384
    Abstract: A light-emitting diode includes, a semiconductor stack including a first semiconductor layer, a second semiconductor layer, and an active layer. The light-emitting diode also includes a transparent conductive layer including a first transparent conductive layer disposed on the second semiconductor layer and a second transparent conductive layer disposed on the first transparent conductive layer. The second transparent conductive layer has a conductivity different than the first transparent conductive layer.
    Type: Application
    Filed: June 12, 2018
    Publication date: October 11, 2018
    Inventors: Chan Seob SHIN, Hyoung Jin LIM, Kyoung Wan KIM, Yeo Jin YOON, Jacob J RICHARDSON, Daniel ESTRADA, Evan C. O'HARA, Haoran SHI
  • Patent number: 10020425
    Abstract: A light-emitting diode includes, a semiconductor stack including a first semiconductor layer, a second semiconductor layer, and an active layer. The light-emitting diode also includes a transparent conductive layer including a first transparent conductive layer disposed on the second semiconductor layer and a second transparent conductive layer disposed on the first transparent conductive layer. The second transparent conductive layer has a conductivity different than the first transparent conductive layer.
    Type: Grant
    Filed: September 25, 2013
    Date of Patent: July 10, 2018
    Assignee: Seoul Semiconductor Co., Ltd.
    Inventors: Chan Seob Shin, Hyoung Jin Lim, Kyoung Wan Kim, Yeo Jin Yoon, Jacob J Richardson, Daniel Estrada, Evan C. O'Hara, Haoran Shi
  • Patent number: 9698269
    Abstract: Fin-type transistor fabrication methods and structures are provided having one or more nitrided conformal layers, to improve reliability of the semiconductor device. The method includes, for example, providing at least one material layer disposed, in part, conformally over a fin extending above a substrate, the material layer(s) including a gate dielectric layer; and performing a conformal nitridation process over an exposed surface of the material layer(s), the conformal nitridation process forming an exposed, conformal nitrided surface.
    Type: Grant
    Filed: March 3, 2016
    Date of Patent: July 4, 2017
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Wei Hua Tong, Tien-Ying Luo, Yan Ping Shen, Feng Zhou, Jun Lian, Haoran Shi, Min-hwa Chi, Jin Ping Liu, Haiting Wang, Seung Kim
  • Publication number: 20160254145
    Abstract: Methods of forming condensed first layer and semiconductor structures formed from the methods are provided. The methods include, for instance providing at least one layer disposed over a substrate structure of a semiconductor structure, wherein the substrate structure includes an upper silicon region; and performing at least one oxidation process of the semiconductor structure, the at least one oxidation process reducing a thickness of the upper region, wherein the performing facilitates diffusing to form a condensed layer over the substrate structure.
    Type: Application
    Filed: February 27, 2015
    Publication date: September 1, 2016
    Applicant: GLOBALFOUNDRIES INC.
    Inventors: Dina H. TRIYOSO, Wei Hua TONG, Haoran SHI, Jeremy Austin WAHL, Amy Lynn CHILD
  • Publication number: 20160218244
    Abstract: A light-emitting diode includes, a semiconductor stack including a first semiconductor layer, a second semiconductor layer, and an active layer. The light-emitting diode also includes a transparent conductive layer including a first transparent conductive layer disposed on the second semiconductor layer and a second transparent conductive layer disposed on the first transparent conductive layer. The second transparent conductive layer has a conductivity different than the first transparent conductive layer.
    Type: Application
    Filed: September 25, 2013
    Publication date: July 28, 2016
    Inventors: Chan Seob SHIN, Hyoung Jin LIM, Kyoung Wan KIM, Yeo Jin YOON, Jacob J. RICHARDSON, Daniel ESTRADA, Evan C. O'HARA, Haoran SHI
  • Publication number: 20160190324
    Abstract: Fin-type transistor fabrication methods and structures are provided having one or more nitrided conformal layers, to improve reliability of the semiconductor device. The method includes, for example, providing at least one material layer disposed, in part, conformally over a fin extending above a substrate, the material layer(s) including a gate dielectric layer; and performing a conformal nitridation process over an exposed surface of the material layer(s), the conformal nitridation process forming an exposed, conformal nitrided surface.
    Type: Application
    Filed: March 3, 2016
    Publication date: June 30, 2016
    Applicant: GLOBALFOUNDRIES Inc.
    Inventors: Wei Hua TONG, Tien-Ying LUO, Yan Ping SHEN, Feng ZHOU, Jun LIAN, Haoran SHI, Min-hwa CHI, Jin Ping LIU, Haiting WANG, Seung KIM
  • Patent number: 9312145
    Abstract: Fin-type transistor fabrication methods and structures are provided having one or more nitrided conformal layers, to improve reliability of the semiconductor device. The method includes, for example, providing at least one material layer disposed, in part, conformally over a fin extending above a substrate, the material layer(s) including a gate dielectric layer; and performing a conformal nitridation process over an exposed surface of the material layer(s), the conformal nitridation process forming an exposed, conformal nitrided surface.
    Type: Grant
    Filed: March 7, 2014
    Date of Patent: April 12, 2016
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Wei Hua Tong, Tien-Ying Luo, Yan Ping Shen, Feng Zhou, Jun Lian, Haoran Shi, Min-hwa Chi, Jin Ping Liu, Haiting Wang, Seung Kim
  • Patent number: 9202697
    Abstract: A method includes forming a gate structure by growing an interfacial layer on a substrate, depositing a High K layer on the interfacial layer, depositing a TiN Cap on the High K layer and forming a thin barrier layer on the TiN Cap. The gate structure is annealed.
    Type: Grant
    Filed: July 19, 2013
    Date of Patent: December 1, 2015
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Tien-Ying Luo, Feng Zhou, Yan Ping Shen, Haiting Wang, Haoran Shi, Wei Hua Tong, Seung Kim, Yong Meng Lee
  • Publication number: 20150255277
    Abstract: Fin-type transistor fabrication methods and structures are provided having one or more nitrided conformal layers, to improve reliability of the semiconductor device. The method includes, for example, providing at least one material layer disposed, in part, conformally over a fin extending above a substrate, the material layer(s) including a gate dielectric layer; and performing a conformal nitridation process over an exposed surface of the material layer(s), the conformal nitridation process forming an exposed, conformal nitrided surface.
    Type: Application
    Filed: March 7, 2014
    Publication date: September 10, 2015
    Applicant: GLOBALFOUNDRIES INC.
    Inventors: Wei Hua TONG, Tien-Ying LUO, Yan Ping SHEN, Feng ZHOU, Jun LIAN, Haoran SHI, Min-hwa CHI, Jin Ping LIU, Haiting WANG, Seung KIM
  • Patent number: 8957427
    Abstract: A method of forming a ZnO layer on a substrate and an LED including a ZnO layer formed by the method are provided. The ZnO layer is formed by using a Successive Ionic Layer Adsorption and Reaction (SILAR) process. The SILAR process includes: applying a first solution to a substrate comprising GaN, to form an inner ionic layer on the substrate and an outer ionic layer on the inner ionic layer; performing a first washing operation on the substrate to remove the outer ionic layer; and applying a second solution to the washed substrate to convert the inner ionic layer into a ZnO oxide layer.
    Type: Grant
    Filed: June 23, 2014
    Date of Patent: February 17, 2015
    Assignee: Seoul Semiconductor Co., Ltd.
    Inventors: Jacob J. Richardson, Daniel Estrada, Evan O'Hara, Haoran Shi, Shin Chanseob, Yeojin Yoon
  • Publication number: 20150024585
    Abstract: A method includes forming a gate structure by growing an interfacial layer on a substrate, depositing a High K layer on the interfacial layer, depositing a TiN Cap on the High K layer and forming a thin barrier layer on the TiN Cap. The gate structure is annealed.
    Type: Application
    Filed: July 19, 2013
    Publication date: January 22, 2015
    Applicant: GLOBALFOUNDRIES Inc.
    Inventors: Tien-Ying LUO, Feng ZHOU, Yan Ping SHEN, Haiting WANG, Haoran SHI, Wei Hua TONG, Seung KIM, Yong Meng LEE
  • Publication number: 20140306236
    Abstract: A method of forming a ZnO layer on a substrate and an LED including a ZnO layer formed by the method are provided. The ZnO layer is formed by using a Successive Ionic Layer Adsorption and Reaction (SILAR) process. The SILAR process includes: applying a first solution to a substrate comprising GaN, to form an inner ionic layer on the substrate and an outer ionic layer on the inner ionic layer; performing a first washing operation on the substrate to remove the outer ionic layer; and applying a second solution to the washed substrate to convert the inner ionic layer into a ZnO oxide layer.
    Type: Application
    Filed: June 23, 2014
    Publication date: October 16, 2014
    Inventors: Jacob J. RICHARDSON, Daniel ESTRADA, Evan O'HARA, Haoran SHI, Shin CHANSEOB, Yeojin YOON
  • Patent number: 8796693
    Abstract: A method of forming a ZnO layer on a substrate and an LED including a ZnO layer formed by the method are provided. The ZnO layer is formed by using a Successive Ionic Layer Adsorption and Reaction (SILAR) process. The SILAR process includes: applying a first solution to a substrate comprising GaN, to form an inner ionic layer on the substrate and an outer ionic layer on the inner ionic layer; performing a first washing operation on the substrate to remove the outer ionic layer; and applying a second solution to the washed substrate to convert the inner ionic layer into a ZnO oxide layer.
    Type: Grant
    Filed: December 26, 2012
    Date of Patent: August 5, 2014
    Assignee: Seoul Semiconductor Co., Ltd.
    Inventors: Jacob J. Richardson, Daniel Estrada, Evan C. O'Hara, Haoran Shi, Shin Chanseob, Yeojin Yoon
  • Publication number: 20140175452
    Abstract: A method of forming a ZnO layer on a substrate and an LED including a ZnO layer formed by the method are provided. The ZnO layer is formed by using a Successive Ionic Layer Adsorption and Reaction (SILAR) process. The SILAR process includes: applying a first solution to a substrate comprising GaN, to form an inner ionic layer on the substrate and an outer ionic layer on the inner ionic layer; performing a first washing operation on the substrate to remove the outer ionic layer; and applying a second solution to the washed substrate to convert the inner ionic layer into a ZnO oxide layer.
    Type: Application
    Filed: December 26, 2012
    Publication date: June 26, 2014
    Applicant: SEOUL SEMICONDUCTOR CO., LTD.
    Inventors: Jacob J. RICHARDSON, Daniel ESTRADA, Evan C. O'HARA, Haoran SHI, Shin CHANSEOB, Yeojin YOON