Abstract: One or more embodiments of the disclosure are directed to methods of forming structures that are useful for FEOL and BEOL processes. Embodiments of the present disclosure advantageously provide methods of depositing a gapfill material, such as titanium nitride (TiN), in high aspect ratio (AR) structures with small dimensions. Some embodiments advantageously provide seam-free high-quality TiN films to fill high AR trenches with small dimensions. Embodiments of the present disclosure advantageously provide methods of filling 3D structures, such as FinFETs, GAAs, and the like, with a gapfill material without creating a seam. One or more embodiments include selective deposition processes using a carbon (C) layer in order to provide seam-free TiN gapfill in 3D structures, such as GAA devices.

Abstract: Methods of manufacturing electronic devices, such as transistors (negative metal-oxide-semiconductor (NMOS) transistors (e.g., an N-metal stack) and positive metal-oxide-semiconductor (PMOS) transistors (e.g., a P-metal stack)) are described. Embodiments of the disclosure are directed to methods of improving PMOS transistor performance by inhibiting N-metal layer growth. The present disclosure provides two types of processes to reduce or inhibit N-metal layer growth. The disclosure provides methods which include forming a self-assembled monolayer (SAM) on the metal surface (e.g., titanium nitride (TiN)) of the PMOS, and methods which include forming a silicon-containing layer such as silicon oxide (SiOx) on the TiN surface. These two types of processes significantly reduce or inhibit the subsequent growth of an N-metal layer, such as titanium aluminum carbide (TiAlC), on the TiN surface of the PMOS.

Abstract: Embodiments of the disclosure relate to methods of depositing seam-free gapfill. In some embodiments, the gapfill consists of titanium nitride. The gapfill methods comprise forming a first layer and a second layer. The firs layer is formed without treatment or densification, while the second layer is formed with periodic treatment. The resulting gapfill in advantageously seam-free.

Abstract: Some embodiments of the disclosure relate to methods of modifying a heater pedestal to improve temperature and thickness uniformity. Some embodiments of the disclosure relate to the modified heater pedestals with improved temperature and thickness uniformity. In some embodiments, the height of support mesas in different regions of the pedestal are modified to increase temperature uniformity. In some embodiments, the heater elements are moved above the vacuum channel and purge channel to increase temperature uniformity. In some embodiments, the edge ring is modified to be coplanar with the top of a supported substrate.

Abstract: Embodiments of the present disclosure generally relate chamber lids and methods of using such for gas-phase particle reduction. In an embodiment is provided a chamber lid that includes a top wall, a bottom wall, a plurality of vertical sidewalls, and an interior volume within the chamber lid defined by the top wall, the bottom wall, and the plurality of vertical sidewalls. The chamber lid further includes a plurality of air flow apertures, wherein the plurality of air flow apertures is configured to fluidly communicate air into the interior volume and out of the interior volume, and a mesh disposed on a face of at least one of the air flow apertures of the plurality of air flow apertures. In another embodiment is provided a method of processing a substrate in a substrate processing chamber, the substrate processing chamber comprising a chamber lid as described herein.

Abstract: Metal gate stacks and integrated methods of forming metal gate stacks are disclosed. Some embodiment comprise MoN as a PMOS work function material. Some embodiments comprise TiSiN as a high-? capping layer. Some embodiments provide improved PMOS bandedge performance. Some embodiments provide improved PMOS bandedge performance with reduced EOT penalty.