Abstract: Embodiments of this application provide a method for obtaining a transportation scheme, including: obtaining a plurality of route schemes and a plurality of goods allocation scheme sets corresponding to each route scheme, wherein each route scheme comprises a transportation route for transporting to-be-transported goods, and the each of the goods allocation scheme sets includes at least one goods allocation scheme; obtaining, by using a fast loading model, predicted actual loading rates of each goods allocation scheme, wherein the fast loading model is trained using offline simulation data of a loading scheme that is calculated using a three-dimensional loading algorithm; and evaluating, using the actual loading rates, each route scheme and a corresponding goods allocation scheme, to obtain a target transportation scheme.

Abstract: A portable drink holder for a drinkable liquid having a first removable reservoir for storing the liquid at a first end of the holder, a second removable reservoir at a second end of the holder for receiving the liquid and a cooling cartridge having a plurality of passageways for selectively transporting liquid from the first reservoir to the second reservoir. The cooling cartridge including a cooling medium so that the liquid transitions to a second temperature lower than the first temperature as it flows from the first reservoir to the second reservoir.

Abstract: Provided is a method of manufacturing a semiconductor package including a through wiring having precision and a low process defect. The method of manufacturing the semiconductor package includes preparing a conductive member; forming a plane part and projection parts projected from the plane part by removing portions of the conductive member; arranging the conductive member and a semiconductor chip, and forming a sealing member sealing the semiconductor chip and the conductive member; forming through wirings by exposing the projection parts of the conductive member from the sealing member; forming a re-wiring pattern layer which electrically connects the through wirings and the semiconductor chip; and forming external connection members which are electrically connected to the re-wiring pattern layer.