Patents by Inventor Haoyi XIN

Haoyi XIN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11966264
    Abstract: A system of providing power to a chip on a mainboard includes: a first power supply, located on the mainboard, and being configured to receive a first voltage and to provide a second voltage; and a second power supply and a third power supply, located on the mainboard and disposed at different sides of the chip, each of the second power supply and the third power supply is electrically connected to the first power supply to receive the second voltage, the second power supply provides a third voltage to the chip, the third power supply provides a fourth voltage to the chip, and ZBUS_2?5*(ZPS2_2+ZPDN_2), ZBUS_2 is bus impedance between the first power supply and the third power supply, ZPS2_2 is equivalent output impedance of the third power supply, and ZPDN_2 is transmission impedance between the third power supply and the chip.
    Type: Grant
    Filed: May 19, 2023
    Date of Patent: April 23, 2024
    Assignee: Delta Electronics (Shanghai) CO., LTD
    Inventors: Haoyi Ye, Jianhong Zeng, Xiaoni Xin
  • Patent number: 11966124
    Abstract: A display panel includes a display region and a photoelectric sensing region which includes a light transmitting region and a frame region surrounding the light transmitting region; the frame region includes a first region surrounding the light transmitting region, a second region on a side of the first region away from the light transmitting region and surrounding the first region, and a third region between the second region and the display region. The spacers are in an array and in the display region but not in the light transmitting region. A plurality of first support pillars are in the first region, arranged around the light transmitting region, and spaced from each other. A plurality of second support pillars are in the second region, around the second region, and spaced from each other. A plurality of third support pillars are in the third region in an array.
    Type: Grant
    Filed: December 30, 2020
    Date of Patent: April 23, 2024
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Kai Chen, Yanqing Chen, Ruichao Liu, Jie Tong, Xiaofeng Zhang, Weida Qin, Ning Wang, Yan Wang, Wei Li, Haoyi Xin
  • Publication number: 20230296942
    Abstract: A pixel electrode, including: a plurality of strip-shaped first electrodes, where the plurality of the first electrodes are arranged along a first direction, each of the first electrodes extends along a second direction, and the second direction intersects with the first direction; a second electrode, where the second electrode is connected to first ends of the plurality of first electrodes, and the first ends of the plurality of first electrodes are connected through the second electrode; and a third electrode, where the third electrode is connected to a second end of at least one of the first electrodes, and a direction of an electric field of an area in which the third electrode is disposed intersects with both the first direction and the second direction.
    Type: Application
    Filed: December 11, 2020
    Publication date: September 21, 2023
    Inventors: Wei REN, Wei LI, Yanfeng LI, Haoyi XIN, Jing LI, Jingjing XU, Chenrong QIAO, Yanyong SONG, Xu QIAO, Rula SHA, Min ZHANG
  • Publication number: 20230047799
    Abstract: Provided is a pixel structure. The pixel structure includes: a first electrode, a second electrode, and a liquid crystal layer that are disposed on one side of a substrate and successively stacked, wherein one of the first electrode and the second electrode is a pixel electrode and the other of the first electrode and the second electrode is a common electrode, and the second electrode includes a plurality of electrode branches sequentially arranged in a first direction, wherein each of the electrode branches includes a first end portion, a body portion, and a second end portion that are successively connected in a second direction, the body portion including at least one body segment.
    Type: Application
    Filed: October 28, 2022
    Publication date: February 16, 2023
    Inventors: Wei REN, Wei LI, Yanfeng LI, Haoyi XIN, Jing LI, Jingjing XU, Chenrong QIAO, Yanyong SONG, Xu QIAO, Rula SHA, Min ZHANG
  • Publication number: 20220334424
    Abstract: A display panel includes a display region and a photoelectric sensing region, a plurality of spacer, a plurality of first support pillars, a plurality of second support pillars, and a plurality of third support pillars. The display region is located outside the photoelectric sensing region; and the photoelectric sensing region includes a light transmitting region and a frame area surrounding the light transmitting region, and the frame region includes: a first region, a second region, and a third region. The plurality of the spacers are arranged in an array, and located within the display region, but not located within the light transmitting region. The plurality of the first support pillars are located within the first region. The plurality of the second support pillars are located within the second region. The plurality of the third support pillars are located within the third region.
    Type: Application
    Filed: December 30, 2020
    Publication date: October 20, 2022
    Inventors: Kai CHEN, Yanqing CHEN, Ruichao LIU, Jie TONG, Xiaofeng ZHANG, Weida QIN, Ning WANG, Yan WANG, Wei LI, Haoyi XIN
  • Publication number: 20220291538
    Abstract: An array substrate has a display area and a bezel area located on at least one side of the display area. The bezel area includes a bonding region. The array substrate includes a substrate, a plurality of signal lines, a plurality of conductive bumps, and an insulating layer. The signal lines are disposed on the substrate. The conductive blocks are disposed on a portion of the substrate located in the bonding region, and a conductive bump is connected to at least one signal line. The insulating layer covers the plurality of signal lines and is located between every two adjacent conductive bumps. The conductive bump includes a conductive metal layer. A distance from a surface of the conductive metal layer away from the substrate to the substrate is less than or equal to a distance from a surface of the insulating layer away from the substrate to the substrate.
    Type: Application
    Filed: April 14, 2021
    Publication date: September 15, 2022
    Applicants: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Yanyong SONG, Yanfeng LI, Haoyi XIN, Xu QIAO, Chenrong QIAO, Wei REN, Yu XING, Jingjing XU, Rula SHA, Guolei ZHI, Guangshuai WANG, Liwen XIN, Jingwei HOU
  • Patent number: 11396454
    Abstract: A negative thermal expansion material and a preparation method thereof, and a negative thermal expansion film and a preparation method thereof are provided. The negative thermal expansion material includes Eu0.85Cu0.15MnO3-?, wherein 0???2.
    Type: Grant
    Filed: July 17, 2018
    Date of Patent: July 26, 2022
    Assignees: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Wei Li, Pan Guo, Yanqing Chen, Ning Wang, Weida Qin, Haoyi Xin, Yanfeng Li, Chao Li, Yongchao Wang
  • Publication number: 20210331936
    Abstract: A negative thermal expansion material and a preparation method thereof, and a negative thermal expansion film and a preparation method thereof are provided. The negative thermal expansion material includes Eu0.85Cu0.15MnO3-?, wherein 0???2.
    Type: Application
    Filed: July 17, 2018
    Publication date: October 28, 2021
    Inventors: Wei LI, Pan GUO, Yanqing CHEN, Ning WANG, Weida QIN, Haoyi XIN, Yanfeng LI, Chao LI, Yongchao WANG
  • Patent number: 10761331
    Abstract: A display panel includes a base substrate, and a plurality of sub-pixels disposed on the base substrate and located at least in a left eye display area and a right eye display area of the display panel. The left eye display area and the right eye display area are arranged side by side. An area of the display panel outside the left eye display area and the right eye display area is a non-display area.
    Type: Grant
    Filed: December 10, 2018
    Date of Patent: September 1, 2020
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., ORDOS YUANSHENG OPTOELECTRONICS CO., LTD.
    Inventors: Chao Li, Wei Li, Yanfeng Li, Yanqing Chen, Ning Wang, Weida Qin, Pan Guo, Yongchao Wang, Haoyi Xin
  • Publication number: 20190204603
    Abstract: A display panel includes a base substrate, and a plurality of sub-pixels disposed on the base substrate and located at least in a left eye display area and a right eye display area of the display panel. The left eye display area and the right eye display area are arranged side by side. An area of the display panel outside the left eye display area and the right eye display area is a non-display area.
    Type: Application
    Filed: December 10, 2018
    Publication date: July 4, 2019
    Inventors: Chao LI, Wei LI, Yanfeng LI, Yanqing CHEN, Ning WANG, Weida QIN, Pan GUO, Yongchao WANG, Haoyi XIN