Abstract: In the field of power module technologies, a method and an apparatus for designing a substrate of a power module and a terminal device may be provided. The method includes: obtaining input parameters for designing the substrate of the power module; determining types of basic layout units and a quantity of basic layout units of each type in a circuit topology based on information about the circuit topology and a prestored diagram of a structure of each type of basic layout unit; and connecting, by using a pathfinding model, a connection path of graph elements of each basic layout unit in the circuit topology, to obtain a connection diagram of the substrate of the power module.

Abstract: A gate voltage magnitude compensation equalization method and circuit for series operation of power switch transistors are provided. A dynamic voltage equalization of series-connected power switch transistors is implemented by using sampling principles where voltages of the power switch transistors are controlled by gate voltage magnitude and unbalanced voltage differentials are converted into unbalanced current differentials of buffer currents. The gate voltage magnitude compensation equalization method and circuit relates to differential control and works in a dynamic voltage change process of the series-connected power switch transistors, without having a negative effect on operation of the power switch transistors under normal operating conditions.

Abstract: A gate voltage magnitude compensation equalization method and circuit for series operation of power switch transistors are provided. A dynamic voltage equalization of series-connected power switch transistors is implemented by using sampling principles where voltages of the power switch transistors are controlled by gate voltage magnitude and unbalanced voltage differentials are converted into unbalanced current differentials of buffer currents. The gate voltage magnitude compensation equalization method and circuit relates to differential control and works in a dynamic voltage change process of the series-connected power switch transistors, without having a negative effect on operation of the power switch transistors under normal operating conditions.