Abstract: Methods of forming front-end-of the line (FEOL) capacitors such as polysilicon-polysilicon capacitors and metal-insulator-silicon capacitors are provided that are capable of incorporating a high-dielectric constant (k of greater than about 8) into the capacitor structure. The inventive methods provide high capacitance/area devices with low series resistance of the top and bottom electrodes for high frequency responses. The inventive methods provide a significant reduction in chip size, especially in analog and mixed-signal applications where large areas of capacitance are used.

Abstract: Methods of forming front-end-of the line (FEOL) capacitors such as polysilicon-polysilicon capacitors and metal-insulator-silicon capacitors are provided that are capable of incorporating a high-dielectric constant (k of greater than about 8) into the capacitor structure. The inventive methods provide high capacitance/area devices with low series resistance of the top and bottom electrodes for high frequency responses. The inventive methods provide a significant reduction in chip size, especially in analog and mixed-signal applications where large areas of capacitance are used.

Abstract: Methods of forming front-end-of the line (FEOL) capacitors such as polysilicon-polysilicon capacitors and metal-insulator-silicon capacitors are provided that are capable of incorporating a high-dielectric constant (k of greater than about 8) into the capacitor structure. The inventive methods provide high capacitance/area devices with low series resistance of the top and bottom electrodes for high frequency responses. The inventive methods provide a significant reduction in chip size, especially in analog and mixed-signal applications where large areas of capacitance are used.

Abstract: Methods of forming front-end-of the line (FEOL) capacitors such as polysilicon-polysilicon capacitors and metal-insulator-silicon capacitors are provided that are capable of incorporating a high-dielectric constant (k of greater than about 8) into the capacitor structure. The inventive methods provide high capacitance/area devices with low series resistance of the top and bottom electrodes for high frequency responses. The inventive methods provide a significant reduction in chip size, especially in analog and mixed-signal applications where large areas of capacitance are used.

Abstract: Methods of forming front-end-of the line (FEOL) capacitors such as polysilicon-polysilicon capacitors and metal-insulator-silicon capacitors are provided that are capable of incorporating a high-dielectric constant (k of greater than about 8) into the capacitor structure. The inventive methods provide high capacitance/area devices with low series resistance of the top and bottom electrodes for high frequency Responses. The inventive methods provide a significant reduction in chip size, especially in analog and mixed-signal applications where large areas of capacitance are used.

Abstract: A method for forming variable oxide thicknesses across semiconductor chips comprises providing a silicon semiconductor substrate having pre-selected areas open to silicon surface using a photoresist layer; immersing the silicon semiconductor substrate in an HF type electrolytic bath to produce a porous silicon area; and removing the photoresist layer and oxidizing the silicon semiconductor substrate to produce a plurality of thicknesses of gate oxide on the silicon semiconductor substrate.

Abstract: Methods of forming front-end-of the line (FEOL) capacitors such as polysilicon-polysilicon capacitors and metal-insulator-silicon capacitors are provided that are capable of incorporating a high-dielectric constant (k of greater than about 8) into the capacitor structure. The inventive methods provide high capacitance/area devices with low series resistance of the top and bottom electrodes for high frequency responses. The inventive methods provide a significant reduction in chip size, especially in analog and mixed-signal applications where large areas of capacitance are used.

Abstract: A method for integrating a high-k material into CMOS processing schemes is provided. The method includes forming an interfacial oxide, oxynitride and/or nitride layer on a device region of a semiconductor substrate, said interfacial layer having a thickness of less than 10 Å; and (b) forming a high-k dielectric material on said interfacial oxide, oxynitride and/or, nitride layer, said high-k dielectric having a dielectric constant, k, of greater than 8.

Abstract: Semiconductor substrates are contacted with a deionized water solution containing an acidic material.

Abstract: An array of ultrasonic or megasonic transducers is used to clean a substrate. An interference signal that is the superposition of the signals from each transducer enhances the cleaning. The system improves cleaning by providing a higher intensity beam than is available from uncoupled transducers to facilitate removal of smaller particles. In addition, the beam can be swept across the substrate to provide a uniform cleaning of the entire surface, avoiding dead spots. The system can be adapted for use in a vessel or for single wafer processing with a stream of fluid or a puddle of fluid.

Abstract: A silicate glass is selectively etched employing a composition containing a fluoride containing compound and certain organic solvents. Preferred compositions also include water.

Abstract: Oxides such as those commonly used in interlevel dielectrics may be removed employing a liquid composition containing a fluoride-containing compound and an organic solvent. Preferred compositions are substantially nonaqueous and include an anhydride. Improved methods for selective removal of oxides, especially for removal of silicon oxides where pre-exposed (or conductive metal - containing) features are present, where metal (conductive metal - contaimg) features are to be exposed by the desired oxide removal, or where the silcon oxide otherwise contacts metal (or conductive metal - containing) features are provided.

Abstract: A method is provided for treating a plurality of semiconductor substrates using the same aqueous SC-1 solution which solution removes and/or inhibits contamination of the semiconductor surfaces by metallic ions present in the solution or on the substrate surface comprising a basic solution containing hydrogen peroxide and an oxidation-resistant chelating additive such as CDTA in an amount effective to provide the desired treatment results. The SC-1 solution may be the conventional 5:1:1 (water:NH4OH:H2O2) solution or a dilute solution such as a 5:x:1 to 200:x:l solution wherein x is 0.025 to 2.

Abstract: Semiconductor substrates are contacted with a deionized water solution containing an acidic material.

Abstract: Etching residue is selectively removed employing a substantially non-aqueous composition containing a fluoride containing compound and certain organic solvents. Preferred compositions also include an anhydride.

Abstract: Silicon oxide is removed from an article employing a liquid composition containing a fluoride-containing compound, organic solvent, and water. The methods of the invention are especially useful for removal of silicon oxide formed by thermal oxidation of a silicon substrate.

Abstract: Silicon nitride is etched employing a composition containing a fluoride containing compound, certain organic solvents, and water.

Abstract: Etching residue, etching mask and silicon nitride and/or silicon dioxide are etched or removed employing a composition containing a fluoride containing compound, water and certain organic solvents.

Abstract: Silicon nitride is etched employing a composition containing a fluoride containing compound, certain organic solvents, and water.

Abstract: A method is provided for treating a plurality of semiconductor substrates using the same aqueous SC-1 solution which solution removes and/or inhibits contamination of the semiconductor surfaces by metallic ions present in the solution or on the substrate surface comprising a basic solution containing hydrogen peroxide and an oxidation-resistant chelating additive such as CDTA in an amount effective to provide the desired treatment results. The SC-1 solution may be the conventional 5:1:1 (water:NH.sub.4 OH:H.sub.2 O.sub.2) solution or a dilute solution such as a 5:x:1 to 200:x:1 solution wherein x is 0.025 to 2.