Abstract: A barrier article comprises a multilayer article that includes a plurality of core layers and a plurality of binder layers, wherein at least one core layer includes a woven or nonwoven fiber mat or fabric, and wherein at least one binder layer includes a silicone material. The plurality of core layers and binder layers are arranged in an alternating manner. The barrier article is operatively adapted to survive or withstand at least seven cycles of the Torch and Grit Test. The barrier article can be flexible and can provide a thermal insulation and blast protection barrier in, for example, a rechargeable electrical energy storage system.

Abstract: A composite film including at least one backing film made of a backing material, at least one barrier layer made of a barrier film and at least one laminating adhesive layer therebetween. On the side of the barrier layer away from the backing layer, the composite film has a raised pattern, and in the area of the raised pattern, the barrier layer has stretched stretching regions relative to the non-stretched barrier film. In the area of the raised pattern, the barrier layer has on the side facing the backing layer surfaces that are not joined to the backing layer.

Abstract: A node has at least one memory module comprising at least one reflective memory region configured to reflect at least one reflective memory region of one or more other nodes, and the node and the one or more other nodes being configured to communicate on a packet-based serial point-to-point topology network. The node also comprises at least one network switch configured to provide at least two links each configured to connect to at least one non-host peer node on the network, multicast to the one or more other nodes at least one change to the at least one reflective memory region, receive from the one or more other nodes at least one other change to the at least one reflective memory region, and communicate to the at least one memory module the received at least one other change to the at least one reflective memory region.

Abstract: A control unit for industrial applications is provided comprising a first compute box having a first microprocessor and being configured to run at least one first operating system. A second compute box may also be provided having a second microprocessor and being configured to run at least one second operating system. The first and second operating systems may be the same or different. The compute boxes may be mechanically coupled together or connected via one or more copper or fiber-optic cables, for example. Additional compute boxes may be added to expand the capabilities of each control unit. An integrated or detachable display may also be added. A control system for controlling a plurality of local input and output drops or devices is also provided. The control system includes a plurality of control units that may be distributed around an industrial installation and capable of data transfer between each control unit.

Abstract: Devices, systems and methods for providing a daisy-chain topology for networking compute devices having PCIe bridges are disclosed. The daisy-chain topology is an extensible PCIe or similar standard solution that allows for a variable number of nodes. The topology has no chassis and no fixed slots, and there is no single device or bridge designated as the PCIe root. This topology allows additional devices to be added to the daisy-chain without construction of a new chassis. Some or all of can be mechanically coupled to provide a common communication channel. Once connected on the expansion link, any device has the ability to communicate to any other device on the daisy-chain. The devices on the daisy-chain are able to let their CPU or processors directly talk to those of another device. This results in a master/master relationship rather than one device serving as the master and the remaining devices the slaves.

Abstract: Devices, systems and methods for providing a ring topology for physically connecting compute devices having PCIe bridges are disclosed. Each device, having an internal PCIe bus or other similar standard that natively support a tree structure, is connected in a ring to neighboring compute devices. Two physical links connecting each device to the ring are provided, enabling each device to communicate with all of the other devices on the ring, without requiring a server or main host to enumerate or control the flow of information between devices. If a failure occurs in the physical connection at any single point in the ring, there is still an alternate path to communicate with every device. Methods for performing data transfer between PCIe compute devices connected to the ring are also disclosed.

Abstract: Described is a method for manufacturing of carrier element modules of a thin carrier element (4) and a thereon mounted semiconductor chip (2). This method renders possible the application of chips (2) with great dimensions (macro-chips) and a wide variety of different types. A chip transfer moulding process is designed so that a minimised height--without the need for reworking--is achievable, and therefore a less costly surface mounting of the chips can be applied. The manufactured module according to the invention can be used as well as in flexible circuit boards (e.g. for cameras) or in chipcards. The method according to the present invention has a first step of putting the at least one IC (2) onto the carrier element (4), a second step of contacting the at least one IC (2) with the carrier element (4) and a third step of transfer moulding a transfer moulding compound (18) to encapsulate the IC (2).

Abstract: An electronic package (11) which comprises a substrate (12) having several chips (13) arranged thereon, and a plurality of connector pins (26) fitted in pin plates (21-24) and electrically connected via conductors to the chips (13). Each pin plate is mounted by means of at least one flexible connector element (29) connected to the conductors at a respective peripheral section (16-19) of the substrate (12). The pin plates have a base surface in the form of any discretionary polygon, in such a manner that, when folded, form a plane substantially flush with the plane of the substrate (12) into a position beneath the substrate (12), or vice versa. Thus an electronic package is obtained which is less complex in its manufacture and covers a considerably reduced base surface while offering a comparable performance.

Abstract: Conductive structures in polymers are obtained by a method in which poly(organylheteroacetylenes) of formula I ##STR1## or a mixture of poly(organylheteroacetylenes) of formula I and other polymers are exposed to radiation of high energy density, preferably laser radiation. At relatively low temperatures of 100.degree. C. to 600.degree. C., the polymer structure is effected so that electrically conductive structures result. The products are employed in electrical engineering, electronics and microelectronics, preferably as printed conductors. The invention makes it possible to inscribe long-term stable, conductive structures in an insulating polymer matrix in a one-step method, it being possible to use modern computer techniques (computer graphics)and to produce computer-aided conductor structures directly. The polymers can be used without supports or applied on rigid or flexible materials.