Abstract: A method is provided for driving a plurality of light emitters in a plurality of output paths with each output path including at least one light emitter. The method includes the steps of applying a supply voltage level to a plurality of output paths; generating a current for each path during a period of a predetermined length for the output path; sensing a current level for each output path during the period; comparing each sensed current level with a reference level; increasing the supply voltage level if the sensed current level is lower than the reference level; determining a lowest supply voltage level for the worst case output path; and using the lower supply voltage level as a common supply voltage level for all output paths.

Abstract: A method for driving a light-emitting semiconductor is provided. A supply voltage is converted into a secondary output voltage for supplying the light-emitting semiconductor with an output voltage. A level for the supply voltage at the beginning of a high current phase of the light-emitting semiconductor is sensed. A threshold voltage level for the supply voltage level is determined based on the sensed level. The high current phase with the light-emitting semiconductor is stated. The sensed level is continuously compared with the threshold voltage level, and an output current through the light-emitting semiconductor is controlled such that the sensed level does not drop below the threshold voltage level.

Abstract: A heterodyne receiver comprising a gain controllable RF mixer (14) which has a first input connected to a first local oscillator (16) and a second input connected to an RF input. The receiver comprises a peak detector (38) which detects a peak value of an input signal at the second input of the HF mixer and generates a digital control signal if it is determined that the peak value of the input signal is above a predetermined level. A digital automatic gain control circuit (34) decreases upon reception of the digital control signal the gain of the RF mixer.

Abstract: A phase locked loop has a digitally controlled oscillator (DCO) for generating a DCO output signal (fOSC), a clock divider coupled to the DCO and receiving the DCO output signal and outputting a feedback clock signal (fN), and a phase frequency detector (PFD) coupled to the DCO and controlling the DCO by a DCO control signal (dCNTL).

Abstract: The present invention relates to an electronic transmitter for serially transmitting bit sequences. The electronic transmitter includes a detection device 10 and a transmitting device 12. The detection device 10 is adapted to detect a predefined bit sequence for transmittal. The predefined bit sequence is susceptible to inter-symbol-interference. The transmitting device 12 is adapted to transmit serially the detected predefined bit sequence in such a way, that a duration for transmittal of a particular bit in said predefined bit sequence is longer than a duration of transmittal of remaining bits in said predefined bit sequence.

Abstract: An all digital PLL system generates an analog oscillator signal at intermediate frequencies to achieve averaged oscillator frequencies at an extremely high frequency resolution. The PLL system includes a digitally controlled oscillator (10) with a digital control input and an analog signal output, and a feedback loop with a digital loop filter (16) for generating a digital control signal for the digitally controlled oscillator (10). The digital loop filter (16) has a first output providing an integer part (nint) of the digital control signal and a second output providing a fractional part (n??) of the digital control signal.

Abstract: A method for driving a light-emitting semiconductor is provided. A supply voltage is converted into a secondary output voltage for supplying the light-emitting semiconductor with an output voltage. A level for the supply voltage at the beginning of a high current phase of the light-emitting semiconductor is sensed. A threshold voltage level for the supply voltage level is determined based on the sensed level. The high current phase with the light-emitting semiconductor is stated. The sensed level is continuously compared with the threshold voltage level, and an output current through the light-emitting semiconductor is controlled such that the sensed level does not drop below the threshold voltage level.

Abstract: A method is provided for driving a plurality of light emitters in a plurality of output paths with each output path including at least one light emitter. The method includes the steps of applying a supply voltage level to a plurality of output paths; generating a current for each path during a period of a predetermined length for the output path; sensing a current level for each output path during the period; comparing each sensed current level with a reference level; increasing the supply voltage level if the sensed current level is lower than the reference level; determining a lowest supply voltage level for the worst case output path; and using the lower supply voltage level as a common supply voltage level for all output paths.

Abstract: A phase locked loop has a digitally controlled oscillator (DCO) for generating a DCO output signal (fOSC), a clock divider coupled to the DCO and receiving the DCO output signal and outputting a feedback clock signal (fN), and a phase frequency detector (PFD) coupled to the DCO and controlling the DCO by a DCO control signal (dCNTL).

Abstract: In a device and method for programming an industrial robot using a simulation program, control commands are issued by a handheld programming device and these commands are visualized on an image surface as movement and/or processing operations by the robot on the basis of data of the robot. An object to be processed is also displayed on the image surface and a three-dimensional image of the robot and the object is presented.

Abstract: A heterodyne receiver comprising a gain controllable RF mixer (14) which has a first input connected to a first local oscillator (16) and a second input connected to an RF input. The receiver comprises a peak detector (38) which detects a peak value of an input signal at the second input of the HF mixer and generates a digital control signal if it is determined that the peak value of the input signal is above a predetermined level. A digital automatic gain control circuit (34) decreases upon reception of the digital control signal the gain of the RF mixer.

Abstract: A digital audio broadcast (DAB) receiver (10) for receiving an RF signal comprises a low noise amplifier (16), an RF mixer (24) that generates an intermediate frequency signal, and a voltage controlled oscillator (23). The receiver includes a tracking filter (18) downstream of the low noise amplifier (16) and upstream of the RF mixer (24), wherein the tracking filter is tuned to track a selected channel frequency out of the received RF signal. In a described embodiment, the tracking filter includes a bandpass filter (20) and a notch filter (22). A center frequency of the bandpass filter is tuned to track the selected channel frequency; and an attenuation notch of the notch filter is tuned to track a frequency which is separated from the selected channel frequency by a fixed frequency; the attenuation notch of the notch filter is tuned together with the center frequency of the bandpass filter, and the center frequencies of the notch filter and the bandpass filter are separated by a fixed frequency.

Abstract: An all digital PLL system generates an analog oscillator signal at intermediate frequencies to achieve averaged oscillator frequencies at an extremely high frequency resolution. The PLL system includes a digitally controlled oscillator (10) with a digital control input and an analog signal output, and a feedback loop with a digital loop filter (16) for generating a digital control signal for the digitally controlled oscillator (10). The digital loop filter (16) has a first output providing an integer part (nint) of the digital control signal and a second output providing a fractional part (n??) of the digital control signal.

Abstract: The present invention relates to an electronic transmitter for serially transmitting bit sequences. The electronic transmitter includes a detection device 10 and a transmitting device 12. The detection device 10 is adapted to detect a predefined bit sequence for transmittal. The predefined bit sequence is susceptible to inter-symbol-interference. The transmitting device 12 is adapted to transmit serially the detected predefined bit sequence in such a way, that a duration for transmittal of a particular bit in said predefined bit sequence is longer than a duration of transmittal of remaining bits in said predefined bit sequence.

Abstract: In a high-speed serial transmission system (10) comprising a transmitter (12), a transmission line (14) and a receiver (16), the transmitter (12) includes a bit-stream generator (18) for generating a predetermined pseudo random bit sequence (PRBS), and a controllable phase distortion circuit (20) having an input (24) connected to the bit-stream generator (18) and a signal output (26) connected to the transmission line (14).

Abstract: In a device and method for programming an industrial robot using a simulation program, control commands are issued by a handheld programming device and these commands are visualized on an image surface as movement and/or processing operations by the robot on the basis of data of the robot. An object to be processed is also displayed on the image surface and a three-dimensional image of the robot and the object is presented.

Abstract: A prescaler (10; 110) for use in a phase locked loop circuit, having a signal input (12; 112) receiving a digital input signal (SIG_IN) and a signal output (14; 114) supplying a digital output signal (SIG_OUT). A phase shifter (20; 120) receives an input signal from the signal input (12; 112), and supplies a set of n metasignals (METAk; METAI, METAQ, METAIN, METAQN) each having a relative phase shift of 2?/n with respect to another one of these metasignals. A phase selector (22; 122) has n inputs (34; 134I, 134Q, 134IN, 134QN) to each of which is applied a different one of the metasignals (METAk; METAI, METAQ, METAIN, METAQN) and an output (36; 136) that supplies a selected one of the metasignals. A final frequency divider (26; 126) has an input (70; 170) connected to the output (36; 136) of the phase selector (22; 122) and an output (72; 172) forming the signal output (14; 114) of the prescaler.

Abstract: In the proposed method of sampling data that are related to a clock signal, a three test samples are taken from the same data at positions in time spaced from each other by fixed delays by shifting the clock signal in time with respect to the data until the test samples taken from the same data have an identical value. A shifted clock signal is used to take validated samples of the data. Since the clock is shifted in time in relation to the data so that all test samples have an identical value, that value is the true value of a datum sampled within a period of time from the moment of the first test sample to the moment of the last test sample, and a validated data sample is obtained.

Abstract: Solvent systems, and adhesive systems comprising such solvent systems, primarily for use in forming speed-glued table tennis rackets are described. One embodiment of the solvent systems comprises a cycloalkane having from about 3 to about 10 carbon atoms, an ester having from about 2 to about 10 carbon atoms, and a terpene having a molecular weight of from about 110 to about 160. The cycloalkane generally is selected from the group consisting of cyclopentane, cyclohexane, and cycloheptane, with cyclohexane being a currently preferred cycloalkane. A currently preferred ester is ethyl acetate, and a currently preferred terpene is limonene. The solvent system also may comprise an ether, and preferred ethers are dipropylene glycol dimethyl ether and propylene glycol methyl ether acetate.