Abstract: Vapor accumulator reservoirs for semiconductor processing operations, such as atomic layer deposition operations, are provided. Such vapor accumulator reservoirs may include a perimeter plenum volume filled with an inert gas, which may reduce or prevent the leakage of external contaminants into a process gas. In some implementations, the reservoir may be constructed from corrosion-resistant materials to reduce internal contaminants into the process gas.

Abstract: An improved vaporizer for vaporizing a liquid precursor is provided. The vaporizer may include one or more channels with a relatively large wall-area-to-cross-sectional-flow-area ratio and may be equipped with one or more heater elements configured to heat the channels above the vaporization temperature of the precursor. At least some of the channels may be heated above the vaporization temperature but below the Leidenfrost temperature of the precursor. In some implementations, a carrier gas may be introduced at high speed in a direction generally transverse to the precursor flow to mechanically shear the precursor into droplets. Multiple vaporizers may be ganged together in series to achieve complete vaporization, if necessary. The vaporizers may be easily disassembleable for cleaning and maintenance.

Abstract: Provided herein are methods and apparatus for improved flowable dielectric deposition on substrate surfaces. The methods involve improving nucleation and wetting on the substrate surface without forming a thick high wet etch rate interface layer. According to various embodiments, the methods may include single or multi-stage remote plasma treatments of a deposition surface. In some embodiments, a treatment may include exposure to both a reducing chemistry and a hydrogen-containing oxidizing chemistry. Apparatus for performing the methods are also provided.

Abstract: Apparatuses and techniques for providing for variable radial flow conductance within a semiconductor processing showerhead are provided. In some cases, the radial flow conductance may be varied dynamically during use. In some cases, the radial flow conductance may be fixed but may vary as a function of radial distance from the showerhead centerline. Both single plenum and dual plenum showerheads are discussed.

Abstract: Electronic device fabrication processes, apparatuses and systems for flowable gap fill or flowable deposition techniques are described. In some implementations, a semiconductor fabrication chamber is described which is configured to maintain a semiconductor wafer at a temperature near 0° C. while maintaining most other components within the fabrication chamber at temperatures on the order of 5-10° C. or higher than the wafer temperature.

Abstract: Apparatuses and techniques for providing for variable radial flow conductance within a semiconductor processing showerhead are provided. In some cases, the radial flow conductance may be varied dynamically during use. In some cases, the radial flow conductance may be fixed but may vary as a function of radial distance from the showerhead centerline. Both single plenum and dual plenum showerheads are discussed.

Abstract: An improved vaporizer for vaporizing a liquid precursor is provided. The vaporizer may include one or more channels with a relatively large wall-area-to-cross-sectional-flow-area ratio and may be equipped with one or more heater elements configured to heat the channels above the vaporization temperature of the precursor. At least some of the channels may be heated above the vaporization temperature but below the Leidenfrost temperature of the precursor. In some implementations, a carrier gas may be introduced at high speed in a direction generally transverse to the precursor flow to mechanically shear the precursor into droplets. Multiple vaporizers may be ganged together in series to achieve complete vaporization, if necessary. The vaporizers may be easily disassembleable for cleaning and maintenance.

Abstract: Apparatuses and techniques for providing for variable radial flow conductance within a semiconductor processing showerhead are provided. In some cases, the radial flow conductance may be varied dynamically during use. In some cases, the radial flow conductance may be fixed but may vary as a function of radial distance from the showerhead centerline. Both single plenum and dual plenum showerheads are discussed.

Abstract: Higher overall etch rate and throughput for atomic layer removal (ALR) is achieved. The reaction is a self-limiting process, thus limiting the total amount of material that may be etched per cycle. By pumping down the process station between reacting operations, the reaction is partially “reset.” A higher overall etch rate is achieved by a multiple exposure with pump down ALR process.

Abstract: Provided herein are methods and apparatus for improved flowable dielectric deposition on substrate surfaces. The methods involve improving nucleation and wetting on the substrate surface without forming a thick high wet etch rate interface layer. According to various embodiments, the methods may include single or multi-stage remote plasma treatments of a deposition surface. In some embodiments, a treatment may include exposure to both a reducing chemistry and a hydrogen-containing oxidizing chemistry. Apparatus for performing the methods are also provided.

Abstract: Apparatuses and techniques for providing for variable radial flow conductance within a semiconductor processing showerhead are provided. In some cases, the radial flow conductance may be varied dynamically during use. In some cases, the radial flow conductance may be fixed but may vary as a function of radial distance from the showerhead centerline. Both single plenum and dual plenum showerheads are discussed.

Abstract: Methods and apparatus to reduce particle-induced defects on a substrate are provided. In certain embodiments, the methods involve decreasing plasma spread prior to extinguishing the plasma. The plasma is maintained at the decreased plasma spread while particles are evacuated from the processing chamber. In certain embodiments, the methods involve decreasing plasma power prior to extinguishing the plasma. The low-power plasma is maintained while particles are evacuated from the processing chamber.

Abstract: Electronic device fabrication processes, apparatuses and systems for flowable gap fill or flowable deposition techniques are described. In some implementations, a semiconductor fabrication chamber is described which is configured to maintain a semiconductor wafer at a temperature near 0° C. while maintaining most other components within the fabrication chamber at temperatures on the order of 5-10° C. or higher than the wafer temperature.

Abstract: Provided are novel methods of filling gaps with a flowable dielectric material. According to various embodiments, the methods involve performing a surface treatment on the gap to enhance subsequent bottom up fill of the gap. In certain embodiments, the treatment involves exposing the surface to activated species, such as activated species of one or more of nitrogen, oxygen, and hydrogen. In certain embodiments, the treatment involves exposing the surface to a plasma generated from a mixture of nitrogen and oxygen. The treatment may enable uniform nucleation of the flowable dielectric film, reduce nucleation delay, increase deposition rate and enhance feature-to-feature fill height uniformity.

Abstract: In-situ semiconductor process that can fill high aspect ratio (typically at least 6:1, for example 7:1 or higher), narrow width (typically sub 0.13 micron, for example 0.1 micron or less) gaps without damaging underlying features and little or no incidence of voids or weak spots is provided. A protective layer is deposited to protect underlying features in regions of the substrate having lower feature density so that unwanted material may be removed from regions of the substrate having higher feature density. This protective layer may deposits thicker on a low density feature than on a high density feature and may be deposited using a PECVD process or low sputter/deposition ratio HDP CVD process. This protective layer may also be a metallic oxide layer that is resistant to fluorine etching, such as zirconium oxide (ZrO2) or aluminum oxide (Al2O3).

Abstract: Higher overall etch rate and throughput for atomic layer removal (ALR) is achieved. The reaction is a self-limiting process, thus limiting the total amount of material that may be etched per cycle. By pumping down the process station between reacting operations, the reaction is partially “reset.” A higher overall etch rate is achieved by a multiple exposure with pump down ALR process.

Abstract: Methods of filling high aspect ratio, narrow width (e.g., sub-50 nm) gaps on a substrate are provided. The methods provide gap fill with little or no incidence of voids, seams or weak spots. According to various embodiments, the methods depositing dielectric material in the gaps to partially fill the gaps, then performing multi-step atomic layer removal process to selectively etch unwanted material deposited on the sidewalls of the gaps. The multi-step atomic layer removal process involves a performing one or more initial atomic layer removal operations to remove unwanted material deposited at the top of the gap, followed by one or more subsequent atomic layer removal operations to remove unwanted material deposited on the sidewalls of the gap. Each atomic layer removal operation involves selectively chemically reacting a portion of the fill material with one or more reactants to form a solid reaction product, which is then removed.

Abstract: In-situ semiconductor process that can fill high aspect ratio (typically at least 6:1, for example 7:1 or higher), narrow width (typically sub 0.13 micron, for example 0.1 micron or less) gaps without damaging underlying features and little or no incidence of voids or weak spots is provided. A protective layer is deposited to protect underlying features in regions of the substrate having lower feature density so that unwanted material may be removed from regions of the substrate having higher feature density. This protective layer may deposits thicker on a low density feature than on a high density feature and may be deposited using a PECVD process or low sputter/deposition ratio HDP CVD process. This protective layer may also be a metallic oxide layer that is resistant to fluorine etching, such as zirconium oxide (ZrO2) or aluminum oxide (Al2O3).

Abstract: An improved process for depositing a robust fluorosilicate glass film on a substrate in a chamber includes maintaining a total pressure in the chamber of less than about 1.7 torr, introducing vapor phase chemicals such as N2, SiF4, SiH4, and N2O into the chamber, and reacting the vapor-phase chemicals with sufficiently supplied energy to deposit a thin film layer of the fluorosilicate glass on the substrate. Advantageously, the deposited fluorosilicate glass films are chemically, mechanically, and thermally stable without additional processing. Also advantageously, the films are deposited uniformly at rates greater than about 5000 Angstroms per minute with dielectric constants of about 3.4 to about 3.9.