Abstract: The present disclosure relates to authenticity and data security for bus-based communication networks in a vehicle. The present disclosure teaches a protocol frame, a sender on data link layer, and a receiver on data link layer providing such authenticity and data security as well as a communication network in a vehicle employing the protocol frame, the sender and the receiver according to the present disclosure.

Abstract: An electronic anomaly detection unit for use in a vehicle includes an input component for capturing an input variable, wherein the input variable contains state information for at least one component of the vehicle, a memory component for storing state values based on the input variable, a selection component for selecting selected state values from the stored state values, an association component for associating the selected state values with predefined values, wherein the predefined values define a normal state of the component of the vehicle, and a decision component for deciding whether there is an anomalous behavior in the at least one component of the vehicle, based on the association, wherein one or more of the input component, the memory component, the selection component, the association component and the decision component are implemented in hardware.

Abstract: The present disclosure relates to authenticity and data security for bus-based communication networks in a vehicle. The present disclosure teaches a protocol frame, a sender on data link layer, and a receiver on data link layer providing such authenticity and data security as well as a communication network in a vehicle employing the protocol frame, the sender and the receiver according to the present disclosure.

Abstract: An apparatus for handling an incoming communication data frame containing a plurality of bits is provided. The apparatus may include a plurality of data matchers, each data matcher configured to compare a subset of the plurality of bits of the communication data frame with a predetermined data pattern of a plurality of data patterns and to provide a data matcher output to indicate the result of the data matcher comparison, a plurality of selectors, each selector configured to compare a subset of the data matcher outputs of the plurality of data matchers with a predetermined selection pattern of a plurality of selection patterns and to provide a selector output to indicate the result of the selector comparison, and a frame filter configured to transfer the incoming frame to application logic only if the selector outputs of the plurality of selectors match a predetermined filter pattern, and to also transfer the selector outputs of the plurality of selectors to the application logic.

Abstract: A traffic anomaly detector of a Peripheral Component Interconnect express (PCIe) system, including filters configured to filter headers of PCIe transaction layer packets (TLPs) based on respective filter criterion; a classifier configured to trigger an event based on one of the filter criterion or a logical combination of a plurality of the filter criteria; an event counter configured to count a number of the events; and a processor configured to detect, based on a value of the event counter, an anomaly in the PCIe TLP traffic.

Abstract: A sender configured to participate in an in-vehicle network is configured to receive a request for transmitting a payload and generate, in response, a first header in a transport layer and/or a network layer. The sender is further configured to access a key of k bytes length and to generate an authentication tag using the key and at least the first header as additional authentication data. The authentication tag serves to indicate an authenticity of a first frame on the transport and/or network layer as an original frame sent from the sender to a receiver. The sender is configured to generate the first frame comprising the first header, a transport layer payload, and the authentication tag and forward the first frame to the data link layer. The data link layer generates a second frame on the data link layer and transmits the second frame to the in-vehicle network.

Abstract: The present disclosure relates to authenticity and data security for bus-based communication networks in a vehicle. The present disclosure teaches a protocol frame, a sender on data link layer, and a receiver on data link layer providing such authenticity and data security as well as a communication network in a vehicle employing the protocol frame, the sender and the receiver according to the present disclosure.

Abstract: The present disclosure relates to authenticity and data security for bus based communication networks in a vehicle. The present disclosure teaches a protocol frame, a sender on data link layer, and a receiver on data link layer providing such authenticity and data security as well as a communication network in a vehicle employing the protocol frame, the sender and the receiver according to the present disclosure.

Abstract: The present disclosure relates to authenticity and data security for bus-based communication networks in a vehicle. The present disclosure teaches a protocol frame, a sender on data link layer, and a receiver on data link layer providing such authenticity and data security as well as a communication network in a vehicle employing the protocol frame, the sender and the receiver according to the present disclosure.

Abstract: An apparatus for handling an incoming communication data frame containing a plurality of bits is provided. The apparatus may include a plurality of data matchers, each data matcher configured to compare a subset of the plurality of bits of the communication data frame with a predetermined data pattern of a plurality of data patterns and to provide a data matcher output to indicate the result of the data matcher comparison, a plurality of selectors, each selector configured to compare a subset of the data matcher outputs of the plurality of data matchers with a predetermined selection pattern of a plurality of selection patterns and to provide a selector output to indicate the result of the selector comparison, and a frame filter configured to transfer the incoming frame to application logic only if the selector outputs of the plurality of selectors match a predetermined filter pattern, and to also transfer the selector outputs of the plurality of selectors to the application logic.

Abstract: The present disclosure relates to authenticity and data security for bus-based communication networks in a vehicle. The present disclosure teaches a protocol frame, a sender on data link layer, and a receiver on data link layer providing such authenticity and data security as well as a communication network in a vehicle employing the protocol frame, the sender and the receiver according to the present disclosure.

Abstract: An electronic anomaly detection unit for use in a vehicle includes an input component for capturing an input variable, wherein the input variable contains state information for at least one component of the vehicle, a memory component for storing state values based on the input variable, a selection component for selecting selected state values from the stored state values, an association component for associating the selected state values with predefined values, wherein the predefined values define a normal state of the component of the vehicle, and a decision component for deciding whether there is an anomalous behavior in the at least one component of the vehicle, based on the association, wherein one or more of the input component, the memory component, the selection component, the association component and the decision component are implemented in hardware.

Abstract: Embodiments relate to systems and methods for timeout monitoring of concurrent commands or parallel communication channels comprising assigning or de-assigning each one of the commands or communication channels to a corresponding one of a plurality of timeout timers when corresponding commands are to be transmitted or command acknowledges are received respectively.

Abstract: Embodiments relate to systems and methods for timeout monitoring of concurrent commands or parallel communication channels comprising assigning or de-assigning each one of the commands or communication channels to a corresponding one of a plurality of timeout timers when corresponding commands are to be transmitted or command acknowledges are received respectively.

Abstract: Embodiments relate to systems and methods for timeout monitoring of concurrent commands or parallel communication channels comprising assigning or de-assigning each one of the commands or communication channels to a corresponding one of a plurality of timeout timers when corresponding commands are to be transmitted or command acknowledges are received respectively.

Abstract: Some embodiments relate to a Direct Memory Access (DMA) controller. The DMA controller includes a bus controller having a system bus interface and configured to read a pattern from a memory location via the system bus interface. Pattern comparison logic compares the read pattern to at least one predetermined pattern. Control logic induces the bus controller to process a first conditional link over the system bus interface if the read pattern differs from the predetermined pattern, and induces the bus controller to process a second conditional link over the system bus interface if the read pattern differs from the predetermined pattern.

Abstract: Embodiments relate to systems and methods for timeout monitoring of concurrent commands or parallel communication channels comprising assigning or de-assigning each one of the commands or communication channels to a corresponding one of a plurality of timeout timers when corresponding commands are to be transmitted or command acknowledges are received respectively.

Abstract: Embodiments relate to systems and methods for timeout monitoring of concurrent commands or parallel communication channels comprising assigning or de-assigning each one of the commands or communication channels to a corresponding one of a plurality of timeout timers when corresponding commands are to be transmitted or command acknowledges are received respectively.

Abstract: A delay locked loop (DLL) circuit having an expanded operating frequency range is achieved by providing multiple DLLs, each having a different range of operating frequencies. A selection mechanism selects the DLL with the appropriate operating frequency range. The output of the selected DLL is used as the output of the delay locked loop circuit and is fed back to the input of the selected DLL so as to achieve phase lock with an input signal. The selection mechanism can operate in accordance with, among other things, a metallization mask option, the state of one or more pins, the state of one or more bits of a software accessible register or storage device, or the output of a frequency detector which detects the frequency of the input clock signal. The selection mechanism can also cause the selected DLL to be activated and the unselected DLL(s) to be deactivated, thereby conserving power.

Abstract: Some embodiments relate to a Direct Memory Access (DMA) controller. The DMA controller includes a bus controller having a system bus interface and configured to read a pattern from a memory location via the system bus interface. Pattern comparison logic compares the read pattern to at least one predetermined pattern. Control logic induces the bus controller to process a first conditional link over the system bus interface if the read pattern differs from the predetermined pattern, and induces the bus controller to process a second conditional link over the system bus interface if the read pattern differs from the predetermined pattern.