Abstract: A method and system for maintaining synchronization in a home network is disclosed. The home network includes a host ethernet media access controller and an HPNA chip, where control frame and data frame pairs are transferred between the host ethernet media access controller (MAC) and the HPNA chip. The method and system include sending a null frame from the host ethernet MAC to the HPNA chip prior to the data frame, and recognizing the null frame on the HPNA chip as an indication that a next received frame will be the data frame, thereby maintaining synchronization between the control frame and the data frame pairs.

Abstract: A method and arrangement is provided for testing memory external to a network switch and a memory interface bus connecting the external memory to the network switch. The method includes writing, via the memory interface bus and on a per-bit basis, a first prescribed logic pattern to a prescribed region of the memory to check for one of a bus short to ground and a short between adjacent pins of the memory. The first prescribed logic pattern is read to verify operation of the prescribed region of the memory. The method includes writing, via the memory interface bus and on a per-bit basis, a second prescribed logic pattern, complementary to the first prescribed logic pattern, to a prescribed region of the memory to check for one of a bus short to power and a short between adjacent pins of the memory. The second prescribed logic pattern is read to verify operation of the prescribed region of the memory.

Abstract: A method and system for deferring transmission of a data packet over a home network is disclosed, where the home network includes a host media access controller program and a media access controller. The method and system include transmitting a first transmit signal from the host media access controller program to the media access controller (MAC) to transmit a data packet, and asserting a transmit start signal from the MAC in response. The method and system further include receiving a carrier sense signal on the MAC indicating activity on a transmission medium, and delaying assertion of a final transmit signal when it is determined that both the transmit start signal and the carrier sense signal are active, thereby avoiding packet collisions.

Abstract: A method and system for verifying collision detection and resolution in a home network that comprises a plurality of stations is disclosed. Each station in the network includes a host media access controller program and a media access controller, where each station may transmit a frame when a transmission channel is inactive. When a collision is detected, the station ceases transmission of the frame, and chooses a backoff level to resolve the conflict. The station increments a backoff level counter in response to receiving backoff signal from another station on the network, and decrements the backoff counter in response to successfully transmitting the frame. The backoff level counter is maintained such that it may be accessed through the host media access controller for monitoring collision resolution, thereby eliminating the need to monitor signals over the network.

Abstract: A testing arrangement is configured for evaluating the randomness of a number generated by a network device under test configured for sending a data packet on a network medium and generating a random number for an idle interval for a sensed collision. The testing arrangement includes a collision generator configured for generating a collision in response to transmission of the data packet on the network medium, and an analyzer configured for identifying time intervals that the network device under test is transmitting on the network medium. The analyzer, having detected a prescribed minimum number of the identified time intervals, analyzes the identified time intervals to determine the randomness of the random numbers generated by the network device under test.

Abstract: A system is provided for delaying a ready signal from an emulation system, configured for emulating a network device, to a central processing unit (CPU) for initiating an access cycle of the CPU. The system includes an emulation system and a central processing unit (CPU). The emulation system is configured for operating according to an emulation clock having a maximum speed substantially less than a prescribed operating speed of the CPU. The emulation system includes programmable device configured for receiving a ready signal from the emulation system, delaying the ready signal based on the emulation clock, and sending the delayed ready signal to the CPU based on the emulation clock. The delayed ready signal enables the emulation system to complete the access cycle of the CPU prior to the CPU initiating processing of subsequent instructions.

Abstract: A method and system for performing a two-step read on a count register as an atomic read in a home network is disclosed. The count register has a lower half and an upper half, and is incremented in response to an increment signal and is read in response to a read signal. The method and system include reading the lower half of the count register and storing the upper half of the count register in a shadow register in response to detecting the increment signal. The shadow register is then read in order to obtain the value of the upper half of the count register, thereby avoiding reading an incorrect result from the register.

Abstract: An arrangement for testing flow control logic in a network device such as a network switch includes a traffic generator configured for transmitting pause frames having prescribed pause values. The network device is configured for continuously transmitting data frames on a network medium. The traffic generator is configured for outputting a first pause frame to the network device that specifies a first pause interval on the order of ten minutes, followed by outputting during the first pause interval a second pause frame specifying a second pause interval substantially less than the first pause interval, for example on the order of ten seconds. The traffic generator is configured for measuring a time interval between transmission of the first pause frame and reception of subsequent data frames from the network device for evaluation of the flow control logic. Hence, the traffic generator can determine whether the second pause frame causes the flow control logic to cancel the first pause frame.

Abstract: A test system includes a switch emulator, a network test device, and an interface converter. The switch emulator is configured for transmitting first network data on a first media independent interface based on a first interface clock, and the network test device configured for transmitting second network data on a second media independent interface based on a second interface clock. The interface converter, having inverted media independent interfaces, is configured for transferring the first and second network data between the first and second media independent interfaces, and supplying the first and second interface clocks based on an external clock generated by the switch emulator. Hence, network data can be passed between the switch emulator and the network test device according to network protocols, even if the switch emulator is operating at relatively slow speeds.

Abstract: A method and system for optimizing the design of a network controller in a home phone line network is described. More particularly, embodiments of the present invention provide a system for networking computers in a home phone line network. The system includes a first controller that includes a physical layer (PHY) configured to be coupled to a phone line, and a media access control (MAC) configured to be coupled to the PHY. The MAC is separated from the PHY by a partition. The partition enables the MAC to be implemented as a separate circuit from the PHY such that the MAC can be modified during and after the design process while leaving the PHY intact.

Abstract: An apparatus is configured for testing a light emitting diode interface. The apparatus includes an integrated network device having a configuration register and logic for generating LED outputs based on detected network events and stored configuration register values. A light emitting diode is associated with the register. A processor is configured to send a signal to the integrated network device to set the configuration register to cause operation of the light emitting diode independent of network events. Hence, a light emitting diode interface of an integrated network device such as a network switch can be tested without sending data packets to the network device.