Patents by Inventor Harb Ali Abdulhamid

Harb Ali Abdulhamid has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230418620
    Abstract: Generalized boot operations for disaggregated, multiple (multi-) semiconductor die (“die”) computing system, and related methods and computer-readable media are disclosed. In exemplary aspects, to provide for generalized boot-up firmware/software for the computing system that does not have to be reconfigured for different configurations of dies in variations of IC packages, a CPU die (or other die) designated as a primary die is configured to perform a discoverable boot process over a side-band discovery bus to discover the other dies present in an IC package of the computing system and to then control their boot-up operations. In this manner, the boot-up firmware/software executed by the primary die to boot-up the computing system can be generalized irrespective of the number of dies and their particular configuration. In this manner, a generalized boot-up firmware/software can be provided to control boot-up operations of the computing system independent of specific dies included.
    Type: Application
    Filed: June 24, 2022
    Publication date: December 28, 2023
    Inventors: Kha Hong Nguyen, Harb Ali Abdulhamid
  • Publication number: 20230078058
    Abstract: Computing systems employing a secure boot processing system that disallows in-bound access when performing immutable boot-up tasks for enhanced security, and related methods and computer-readable media. The computing system includes a secure boot processing system that performs boot-up operations. The secure boot processing system includes an immutable secure boot subsystem that performs lower-level, immutable boot-up tasks that are critical to the security of the computing system. To prevent or mitigate external unauthorized access to the immutable secure boot subsystem that could compromise the security of the computing system, the immutable secure boot controller is configured to disallow external, inbound access to boot system interface of the secure boot processing system to perform immutable boot-up tasks.
    Type: Application
    Filed: September 10, 2021
    Publication date: March 16, 2023
    Inventors: Phil Mitchell, Harb Ali Abdulhamid, Kha Hong Nguyen
  • Publication number: 20230078138
    Abstract: Computing systems employing measurement of boot components, such as prior to activation of a trusted platform module (TPM), for enhanced boot security, and related methods and computer-readable media. In exemplary aspects, to extend the measured boot process performed by a trusted platform module (TPM) circuit to earlier, primitive boot components that are processed before the TPM circuit becomes available to perform boot measurements, a secure boot processing system is configured to measure earlier, primitive boot components. The measured primitive boot components are used to update a virtual configuration register (CR) value in a final virtual CR. The TPM circuit uses the final virtual CR value as an initial starting CR value to measure subsequent boot components to provide end-to-end security for boot operations. In this manner, the final virtual CR value protects boot integrity of boot operations of its CPU even if they occur before availability of the TPM circuit.
    Type: Application
    Filed: September 1, 2022
    Publication date: March 16, 2023
    Inventors: Vivek Kumar, Harb Ali Abdulhamid, Loc Ho
  • Publication number: 20220244966
    Abstract: Multi-socket computing system employing a parallelized boot architecture with partially-concurrent processor boot-up operations. In a boot of the multi-socket computing system, a first, master CPU in a master CPU socket is configured to receive a master reset signal indicating a boot-up state. In response, the first, master CPU is configured to execute a first boot program code to perform a first CPU boot-up operation. To parallelize the boot operation of a second, slave CPU in a slave CPU socket, the execution of the first boot program code by the first, master CPU includes communicating a slave boot-up synchronization signal indicating the boot-up state to the second CPU to execute a second boot program code to perform a second CPU boot-up operation. The second CPU starts to perform its CPU boot-up operation partially concurrent with the performance of the CPU boot-up operation to reduce overall boot-up time.
    Type: Application
    Filed: January 14, 2022
    Publication date: August 4, 2022
    Inventors: Kha Hong Nguyen, Harb Ali Abdulhamid, Phil Mitchell