Abstract: Various embodiments disclose a computer-implemented method comprising receiving auditory speech signals generated by a user, mapping a first speech portion in the auditory speech signals to a first condition, where the first condition corresponds to a value associated with operation of a first component of a vehicle, mapping a second speech portion in the auditory speech signals to a first action, where the first action corresponds to a first action performed by a second component of the vehicle, generating a routine that includes the first condition and the first action, comparing the routine to a set of stored rules, upon determining that the routine does not overlap with at least one stored rule, storing the routine as a first stored rule, subsequent to storing the first stored rule, determining that the first condition has been satisfied, and causing the second component of the vehicle to perform the first action.

Abstract: A system and method for processing medical data and more specifically to classifying, deidentifying, and securing medical data is provided. The system and method have a backend processor executing a deidentifying process and a classifying process; a frontend processor executing a data input process; at least one user device providing a personal identifier and the medical data to the data input process; the deidentifying process encrypting the personal identifier to produce an encrypted identifier and generating an independent subject identifier; the classifying process classifying the medical data into a hierarchical classification to produce a hierarchical classified data; and storing the encrypted identifier, the independent subject identifier, and the hierarchical classified data in a database.

Abstract: Events that occur in a number of in domain communication channels where each channel is used by a communication service, are detected. A Bayesian Belief Network (BBN) defines a probabilistic cause-effect relationship between each cause and each effect on a victim channel. The probability of each of a number of possible causes as being a cause of interference in the victim channel is determined, by propagating observations of the interference backwards through the BBN.

Abstract: A method and apparatus are disclosed. The method includes one or more of the following: compiling statistical models of physical layers of a communications system; creating a priori distributions of cross-talk transfer functions; storing the models and the a priori distribution in a storage medium; and using the models and the a priori distributions to diagnose probable causes of events detected in said communications system.

Abstract: A computer implemented process and system for electronic design automation (EDA) using groups of multiple cells having loop-back connections for modeling port electrical characteristics. Multi-bit cells have multiple gates of the same function implemented within a same cell. Multi-bit components have multiple multi-bit cells implemented within a same component. Scannable multi-bit cells and components are similar to multi-bit cells and components but contain scannable sequential elements with scan chains installed. Multi-bit cells may or may not have each sequential cells' input and each sequential cells' output available externally. The scannable sequential elements of a multi-bit component are ordered into a predefined scan chain which is defined by the library containing the multi-bit component or multi-bit cell. During scan replacement processes of the EDA compile process, multi-bit cells and components of the netlist are replaced with scannable multi-bit cells and components.

Abstract: A computerized method and system for automatically extracting an IEEE 1149.1 standard design from a netlist and performing compliance checking. The present invention receives the TAP (test access port) description and compliance enable ports of a netlist. The TAP controller is extracted and its state ports are identified, referenced in a boundary scan design database (BSDD) and its states are verified. The TAP controller is controlled so that the instruction register is located and referenced in the BSDD. The TAP controller is controlled so that the bypass register is found and the BSDD is updated. The TAP controller is controlled so that the shift and update cells of the boundary scan register (BSR) are found, the control, input and output BSR cells are characterized and the BSDD is updated. Primary input and output information is also inferred and the device_ID register is found. Frontier pins are used to locate signatures of the remaining instructions and their test data registers are found.

Abstract: A method of and system for inserting test points within an integrated circuit design. According to the present invention, test points are inserted early in the electronic design process and prior to logic synthesis such that the problem of design constraint violation can be avoided. One embodiment of the present invention includes the computer implemented steps of receiving an unmapped netlist of an integrated circuit design, and receiving from an external source, data that indicates the location and the desired functionality of the test point to be inserted. Thereafter, the present invention inserts a generic test point circuit at the indicated location and generates a modified unmapped netlist. Subsequently, the present invention performs a logic synthesis process on the modified unmapped netlist where the generic test point circuit is degenerated into an actual test point circuit for performing the desired functionality.

Abstract: A computerized method and system for automatically extracting an IEEE 1149.1 standard design from a netlist and performing compliance checking. The present invention receives the TAP (test access port) description and compliance enable ports of a netlist. The TAP controller is extracted and its state ports are identified, referenced in a boundary scan design database (BSDD) and its states are verified. The TAP controller is controlled so that the instruction register is located and referenced in the BSDD. The TAP controller is controlled so that the bypass register is found and the BSDD is updated. The TAP controller is controlled so that the shift and update cells of the boundary scan register (BSR) are found, the control, input and output BSR cells are characterized and the BSDD is updated. Primary input and output information is also inferred and the device.sub.-- ID register is found. Frontier pins are used to locate signatures of the remaining instructions and their test data registers are found.

Abstract: A computerized method and system for automatically extracting an IEEE 1149.1 standard design from a netlist and performing compliance checking. The present invention receives the TAP (test access port) description and compliance enable ports of a netlist. The TAP controller is extracted and its state ports are identified, referenced in a boundary scan design database (BSDD) and its states are verified. The TAP controller is controlled so that the instruction register is located and referenced in the BSDD. The TAP controller is controlled so that the bypass register is found and the BSDD is updated. The TAP controller is controlled so that the shift and update cells of the boundary scan register (BSR) are found, the control, input and output BSR cells are characterized and the BSDD is updated. Primary input and output information is also inferred and the device.sub.-- ID register is found. Frontier pins are used to locate signatures of the remaining instructions and their test data registers are found.