Abstract: The present disclosure detects and/or prevents power analysis side-channel attacks without requiring the use of external measurement devices. A first portion of field programmable gate array (FPGA) circuitry is configured to provide emulated hardware device circuitry and a second portion of the FPGA circuitry is configured to provide power monitoring circuitry. The emulated hardware device circuitry and the power monitoring circuitry are coupled to FPGA power distribution network circuitry. The power monitoring circuitry includes time-to-digital converter (TDC) circuitry that includes observation delay buffers to sample a clock propagation delay. Since the voltage supplied to the buffer circuitry affects the propagation delay, the TDC circuitry outputs a binary sequence representative of one or more power delivery parameters to the emulated hardware device circuitry.