Abstract: A storage cluster with disaggregated compute resources and storage memory is provided. The storage cluster includes a plurality of blades coupled as the storage cluster, each of at least a subset of the plurality of blades having solid-state storage memory therein. The storage cluster includes a switch that direct network-connects a plurality of processors, as compute resources in the plurality of blades, and the solid-state storage memory in each of the at least a subset of the plurality of blades, wherein the compute resources and the solid-state storage memory are disaggregated in the storage cluster.

Abstract: A method for a transactional commit in a storage unit is provided. The method includes receiving a logical record from a storage node into a transaction engine of a storage unit of the storage node and writing the logical record into a data structure of the transaction engine. The method includes writing, to a command queue of the transaction engine, an indication to perform an atomic update using the logical record and transferring each portion of the logical record from the data structure of the transaction engine to non-persistent memory of the storage unit as a committed transaction. A storage unit for a storage system is also provided.

Abstract: A first set of physical units of a storage device of a storage system is selected for performance of low latency access operations, wherein other access operations are performed by remaining physical units of the storage device. A determination as to whether a triggering event has occurred that causes a selection of a new set of physical units of the storage device for the performance of low latency access operations is made. A second set of physical units of the storage device is selected for the performance of low latency access operations upon determining that the triggering event has occurred.

Abstract: An amount of power to be used by a storage system including storage devices having multiplane dies is identified. A number of planes of one or more of the multiplane dies used simultaneously for accessing data are adjusted such that a power usage of the storage system is less than or equal to the amount of power. A block size for allocating blocks by combining a set of erase blocks at a same address in separate planes based on the adjusted number of planes is utilized.

Abstract: A method for adjustable error correction in a storage cluster is provided. The method includes determining health of a non-volatile memory of a non-volatile solid-state storage unit of each of a plurality of storage nodes in a storage cluster on a basis of per flash package, per flash die, per flash plane, per flash block, or per flash page. The determining is performed by the storage cluster. The plurality of storage nodes is housed within a chassis that couples the storage nodes as the storage cluster. The method includes adjusting erasure coding across the plurality of storage nodes based on the health of the non-volatile memory and distributing user data throughout the plurality of storage nodes through the erasure coding. The user data is accessible via the erasure coding from a remainder of the plurality of storage nodes if any of the plurality of storage nodes are unreachable.

Abstract: A storage system is provided. The storage system include a primary storage node that includes a primary processing device. The primary storage node is communicatively coupled to a secondary storage node. The secondary storage node includes a secondary processing device and a set of non-volatile memory modules. The primary processing device is to identify one or more storage operations to be performed on the set of non-volatile memory modules of the secondary storage node and transmit one or more instructions to the secondary storage node to perform the one or more storage operations, the one or more storage operations performed by the secondary processing device.

Abstract: Data is received by one or more offload components that is to be stored in a storage system. The one or more offload components are operatively coupled to storage devices of the storage system via a first set of communication paths. The data is identified by a storage system controller operatively coupled to the storage devices via a second set of communication paths that are different than the first set of communication paths. An indication of a location in one or more of the storage devices for storing the data is transmitted to the one or more offload components. The indication causes the one or more offload components to store the data in the location of the one or more of the storage devices via the first set of communication paths.

Abstract: A plurality of storage nodes within a single chassis is provided. The plurality of storage nodes is configured to communicate together as a storage cluster. The plurality of storage nodes has a non-volatile solid-state storage for user data storage. The plurality of storage nodes is configured to distribute the user data and metadata associated with the user data throughout the plurality of storage nodes, with erasure coding of the user data. The plurality of storage nodes is configured to recover from failure of two of the plurality of storage nodes by applying the erasure coding to the user data from a remainder of the plurality of storage nodes. The plurality of storage nodes is configured to detect an error and engage in an error recovery via one of a processor of one of the plurality of storage nodes, a processor of the non-volatile solid state storage, or the flash memory.

Abstract: A first tuning process to be performed on an erase block of the solid-state storage device is provided by a storage system controller that is external to the solid-state storage device. Results of the first tuning process on the erase block are stored as metadata in the solid-state storage device. A second tuning process to be performed on the erase block is selected based on accessing the results of the tuning process in the metadata.

Abstract: A storage system with storage drives and a processing device establishes resiliency groups of storage system resources. The storage system determines an explicit trade-off between data survivability over resource failures and data capacity efficiency, for the resiliency groups. Responsive to adding at least one storage drive, the storage system establishes re-formed resiliency groups according to the explicit trade-off, without decreasing data survivability. The storage system may bias to have more and narrower resiliency groups to increase mean time to data loss.

Abstract: One or more performance parameters associated with data stored at a storage device of a plurality of storage devices are received by a storage controller. A first number of blocks of the storage device to a high resiliency portion and a second number of blocks of the storage device to a low resiliency portion of the storage device are allocated based on the one or more performance parameters.

Abstract: A storage system has NVRAM (nonvolatile random-access memory), storage memory that includes SLC (single level cell) flash memory and QLC (quad level cell) flash memory, and a processor. The processor performs a method that includes determining that a size of a buffer of a storage system should be adjusted. The storage system comprises a non-volatile random-access memory (NVRAM), single level cell (SLC) flash memory, and quad level cell (QLC) flash memory. The buffer of the storage system comprises one or more of the NVRAM and a portion of the SLC flash memory. The method also includes adjusting the size of the buffer of the storage system to a first size.

Abstract: A storage system is provided. The storage system includes a plurality of non-volatile memory units and a processor operatively coupled to a plurality of non-volatile memory units. The processor is to perform a method including receiving a request to read data from the storage system. The method also includes determining whether a storage operation should be delayed, based on the request to read the data from the storage system. The method further includes in response to determining that the storage operation should be delayed, delaying the storage operation. The method further includes performing a read operation for the request to read the data.

Abstract: A request to read data from a storage system is received. One of an interruptible write operation or an interruptible erase operation being performed on flash memory of the storage system are paused by a storage system controller. A read operation for the request to read the data is performed. The one of the interruptible write operation or interruptible erase operation are resumed.

Abstract: A storage cluster with disaggregated compute resources and storage memory is provided. The storage cluster includes a plurality of blades coupled as the storage cluster, each of at least a subset of the plurality of blades having solid-state storage memory therein. The storage cluster includes a switch that direct network-connects a plurality of processors, as compute resources in the plurality of blades, and the solid-state storage memory in each of the at least a subset of the plurality of blades, wherein the compute resources and the solid-state storage memory are disaggregated in the storage cluster.

Abstract: A storage system is provided. The storage system includes a plurality of non-volatile memory modules and a storage system controller. One or more non-volatile memory modules include a multiplane die. A processing device of the storage system controller is configured to determine that a number of planes of the multiplane die used simultaneously for accessing data should be changed. In response to determining that the number of planes the multiplane die used simultaneously for accessing data should be changed, the processing device is configured to move one or more portions from an existing erase block to a new erase block, the existing erase block being a different size than the new erase block.

Abstract: A storage system is provided. The storage system includes a plurality of non-volatile memory modules and a storage system controller. One or more non-volatile memory modules include a multiplane die. A processing device of the storage system controller is configured to determine that a number of planes of the multiplane die used simultaneously for accessing data should be changed. In response to determining that the number of planes the multiplane die used simultaneously for accessing data should be changed, the processing device is configured to move one or more portions from an existing erase block to a new erase block, the existing erase block being a different size than the new erase block.

Abstract: A method providing a communication component within a storage drive bay of a storage system, the communication component providing an alternative communication path between multiple storage controllers from a first communication path. The method includes replacing one of the multiple storage controllers with an upgraded storage controller and establishing communication with a remaining storage controller and the upgraded storage controller through the alternative communication path. The method includes replacing the remaining storage controller with another upgraded controller and reestablishing communication between the upgraded controllers over the first communication path.

Abstract: A method of tracking flash memory in a storage system is provided. The method includes initializing a bad blocks threshold value and marking one or more planes or logical unit numbers (LUNs) of flash memory as bad, responsive to determining that bad blocks in the one or more planes or LUNs meet the bad blocks threshold value. The method includes adjusting the bad blocks threshold value, responsive to exceeding a threshold number or rate of retiring planes or LUNs of flash memory, and repeating the marking and the adjusting, with the bad blocks threshold value capped at a maximum threshold value.

Abstract: A system and related method operate solid-states storage memory. The system performs a first tuning process that has a first set of tuning options, on a first portion of solid-states storage memory. The system identifies one or more second portions of solid-states storage memory, within the first portion of solid-states storage memory that fail readability after the first tuning process. The system performs a second tuning process that has a differing second set of tuning options, on each of the one or more second portions of solid-states storage memory.