Patents by Inventor Hari Moorthy

Hari Moorthy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230046494
    Abstract: Systems and methods for market value at risk evaluation are disclosed. In one embodiment, a method for performing a calculation workflow may include (1) a server comprising a computer processor receiving a request for a calculation; (2) the server receiving at least one data parameter; (3) the server identifying a plurality of workflow components required for the calculation; (4) the server identifying dependencies for each identified workflow component; (5) the server ordering the identified workflow components based on the dependencies for each workflow component; (6) the server retrieving data to conduct the calculation; and (7) the server performing the requested calculation using the ordered workflow components based on the data parameter and the data.
    Type: Application
    Filed: September 9, 2016
    Publication date: February 16, 2023
    Inventors: Vadim TSUKHTMAN, Hiang Swee CHIANG, Hari MOORTHY, Viktor VOROSHYLO, Bolei GUO, Jonathan Koop
  • Patent number: 11182754
    Abstract: Methods for synthetic transaction monitoring are disclosed. In one embodiment, in an information processing apparatus comprising at least one computer processor, a method for synthetic system monitoring may include: (1) generating a synthetic transaction having a nominal value; (2) at a test interface, initiating the synthetic transaction into a transaction processing flow comprising a plurality of transaction elements; (3) the test interface receiving, from a first transaction element of the plurality of transaction elements, a first transaction state for the transaction; (4) the test interface comparing the first transaction state to a first expected transaction state for the first transaction element; and (5) the test interface generating an output based on the comparison.
    Type: Grant
    Filed: August 28, 2018
    Date of Patent: November 23, 2021
    Assignee: JPMORGAN CHASE BANK, N.A.
    Inventors: Karunakar Rachala, Hasnain Aziz, Hari Moorthy, Umasankar Nistala, Michael Gillott, Bipraditya Chaudhuri
  • Publication number: 20200320632
    Abstract: According to an embodiment of the present invention, a system and method for implementing a time series management infrastructure comprises: a database that stores time series data from a plurality of internal and external sources; a rules engine that defines and executes one or more rules algorithms; and a computer processor, coupled to the database and the rules engine, programmed to: verify time series data from the plurality of internal and external sources; automatically identify outlier errors using an outlier detection algorithm based on a curve validation where a curve represents a series of date and point pairs; automatically correct the identified errors using one or more of: a gap filling technique and a back filling technique; and electronically transmit corresponding results to an interactive user interface.
    Type: Application
    Filed: December 24, 2015
    Publication date: October 8, 2020
    Inventors: Luc Michel Teboul, Hari Moorthy
  • Publication number: 20200074425
    Abstract: Methods for synthetic transaction monitoring are disclosed. In one embodiment, in an information processing apparatus comprising at least one computer processor, a method for synthetic system monitoring may include: (1) generating a synthetic transaction having a nominal value; (2) at a test interface, initiating the synthetic transaction into a transaction processing flow comprising a plurality of transaction elements; (3) the test interface receiving, from a first transaction element of the plurality of transaction elements, a first transaction state for the transaction; (4) the test interface comparing the first transaction state to a first expected transaction state for the first transaction element; and (5) the test interface generating an output based on the comparison.
    Type: Application
    Filed: August 28, 2018
    Publication date: March 5, 2020
    Inventors: Karunakar Rachala, Hasnain Aziz, Hari Moorthy, Umasankar Nistala, Michael Gillott
  • Patent number: 9054412
    Abstract: Disclosed are various embodiments providing processing circuitry for selecting a channel estimation filter from a plurality of channel estimation filters based on a channel quality metric, the selected channel estimation filter being associated with an intrinsic coefficient. The processing circuitry may then determine a scaled coefficient, the scale coefficient being based on scaling the intrinsic coefficient with respect to a bit size constraint, the bit size constraint being determined by a bit length of a multiplication circuitry operand. Moreover, the processing circuitry may generate an output based on the scaled coefficient and an input signal.
    Type: Grant
    Filed: June 26, 2012
    Date of Patent: June 9, 2015
    Assignee: Broadcom Corporation
    Inventors: Hari Moorthy, Wei Luo
  • Publication number: 20150120611
    Abstract: Systems and methods are provided for multi-style portfolio cash flow enhancement. The systems and methods include identifying a first set of one or more investment sleeves within an investment account as underweighted relative to a desired target and identifying a second set of one or more investment sleeves within the investment account as overweighted relative to the desired target, where the investment account includes a plurality of investment sleeves and where each investment sleeve includes at least one asset.
    Type: Application
    Filed: August 18, 2014
    Publication date: April 30, 2015
    Applicant: FISERV INVESTMENT SOLUTIONS, INC.
    Inventors: Joseph A. Barone, Charles Raymond Smith, III, William McKinney, Hari Moorthy
  • Publication number: 20130259176
    Abstract: Disclosed are various embodiments providing processing circuitry for selecting a channel estimation filter from a plurality of channel estimation filters based on a channel quality metric, the selected channel estimation filter being associated with an intrinsic coefficient. The processing circuitry may then determine a scaled coefficient, the scale coefficient being based on scaling the intrinsic coefficient with respect to a bit size constraint, the bit size constraint being determined by a bit length of a multiplication circuitry operand. Moreover, the processing circuitry may generate an output based on the scaled coefficient and an input signal.
    Type: Application
    Filed: June 26, 2012
    Publication date: October 3, 2013
    Applicant: Broadcom Corporation
    Inventors: Hari Moorthy, Wei Luo