Patents by Inventor Hari S. Venugopalan
Hari S. Venugopalan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7843074Abstract: A light emitting chip is disposed on a support surface. A plurality of bonding bumps are disposed in a gap between the light emitting chip and the support surface. The plurality of bonding bumps provide at least one electrical power input path to the light emitting chip. An underfill comprising underfill material is disposed in the gap between the light emitting chip and the support surface such that the underfill substantially fills the gap but does not form a fillet extending outside the gap over sidewalls of the light emitting chip. The underfill is configured to provide at least one of (i) mechanical support for the light emitting chip and (ii) a thermal conduction path from the light emitting chip to the support surface.Type: GrantFiled: September 12, 2006Date of Patent: November 30, 2010Assignee: Lumination LLCInventors: Xiang Gao, Michael Sackrison, Hari S. Venugopalan
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Publication number: 20100181584Abstract: A light emitting device includes a stack of semiconductor layers defining a light emitting pn junction and a dielectric layer disposed over the stack of semiconductor layers. The dielectric layer has a refractive index substantially matching a refractive index of the stack of semiconductor layers. The dielectric layer has a principal surface distal from the stack of semiconductor layers. The distal principal surface includes patterning, roughening, or texturing configured to promote extraction of light generated in the stack of semiconductor layers.Type: ApplicationFiled: July 11, 2006Publication date: July 22, 2010Inventors: Xiang Gao, Hari S. Venugopalan, Michael Sackrison, Ivan Eliashevich
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Patent number: 7385229Abstract: A p-type contact (30) is disclosed for flip chip bonding and electrically contacting a p-type group III-nitride layer (28) of a group III-nitride flip chip light emitting diode die (10) with a bonding pad (60). A first palladium layer (42) is disposed on the p-type group III-nitride layer (28). The first palladium layer (42) is diffused through a native oxide of the p-type group III-nitride layer (28) to make electrical contact with the p-type group III-nitride layer (28). A reflective silver layer (44) is disposed on the first palladium layer (42). A second palladium layer (46) is disposed on the silver layer (44). A bonding stack (48) including at least two layers (50, 52, 54) is disposed on the second palladium layer (46). The bonding stack (48) is adapted for flip chip bonding the p-type layer (28) to the bonding pad (60).Type: GrantFiled: July 7, 2006Date of Patent: June 10, 2008Assignee: Lumination LLCInventor: Hari S. Venugopalan
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Publication number: 20080121902Abstract: A light emitting package includes a support (12, 112, 212) defining a support surface (14). A first light emitting diode chip (20, 120, 220) is secured to the supporting surface and is configured to emit light having a first spectral distribution. A second light emitting diode chip (22, 122, 123, 222) is secured to the first light emitting diode chip. The second light emitting diode chip is configured to emit light having a second spectral distribution different from the first spectral distribution. Optionally, a third light emitting diode chip (223) is disposed on the second light emitting diode chip (222).Type: ApplicationFiled: September 7, 2006Publication date: May 29, 2008Inventors: Michael Sackrison, Xiang Gao, Srinath K. Aanegola, Hari S. Venugopalan
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Patent number: 7358539Abstract: A flip chip light emitting diode die (12) includes a light-transmissive substrate (20) and a plurality of semiconductor layers (22) are disposed on the light-transmissive substrate (20). The semiconductor layers (22) define a light-generating p/n junction. An electrode (30) is formed on the semiconductor layers (22) for flip-chip bonding the diode die (12) to an associated mount (14). The electrode (30) includes an optically transparent layer (42) formed of a substantially optically transparent material adjacent to the semiconductor layers (22) that makes ohmic contact therewith, and a reflective layer (44) adjacent to the optically transparent layer (42) and in electrically conductive communication therewith.Type: GrantFiled: April 9, 2003Date of Patent: April 15, 2008Assignee: Lumination LLCInventors: Hari S. Venugopalan, Ivan Eliashevich
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Publication number: 20080061312Abstract: A light emitting chip is disposed on a support surface. A plurality of bonding bumps are disposed in a gap between the light emitting chip and the support surface. The plurality of bonding bumps provide at least one electrical power input path to the light emitting chip. An underfill comprising underfill material is disposed in the gap between the light emitting chip and the support surface such that the underfill substantially fills the gap but does not form a fillet extending outside the gap over sidewalls of the light emitting chip. The underfill is configured to provide at least one of (i) mechanical support for the light emitting chip and (ii) a thermal conduction path from the light emitting chip to the support surface.Type: ApplicationFiled: September 12, 2006Publication date: March 13, 2008Inventors: Xiang Gao, Michael Sackrison, Hari S. Venugopalan
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Patent number: 7285801Abstract: A light emitting semiconductor device die (10, 110, 210, 310) includes an electrically insulating substrate (12, 112). First and second spatially separated electrodes (60, 62, 260, 262, 360, 362) are disposed on the electrically insulating substrate. The first and second electrodes define an electrical current flow direction directed from the first electrode to the second electrode. A plurality of light emitting diode mesas (30, 130, 130?, 230, 330) are disposed on the substrate between the first and second spatially separated electrodes. Electrical series interconnections (50, 150, 250, 350) are disposed on the substrate between neighboring light emitting diode mesas. Each series interconnection carries electrical current flow between the neighboring mesas in the electrical current flow direction.Type: GrantFiled: April 2, 2004Date of Patent: October 23, 2007Assignee: Lumination, LLCInventors: Ivan Eliashevich, Chris Bohler, Bryan S. Shelton, Hari S. Venugopalan, Xiang Gao
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Patent number: 7190005Abstract: A light-emitting element (24) is disclosed. A light emitting diode (LED) includes a sapphire substrate (26) having front and back sides (33, 35), and a plurality of semiconductor layers (28, 30, 32) deposited on the front side (33) of the sapphire substrate (26). The semiconductor layers (28, 30, 32) define a light-emitting structure that emits light responsive to an electrical input. A metallization stack (40) includes an adhesion layer (34) deposited on the back side (35) of the sapphire substrate (26), and a solderable layer (38) connected to the adhesion layer (34) such that the solderable layer (38) is secured to the sapphire substrate (26) by the adhesion layer (34). A support structure (42) is provided on which the LED is disposed. A solder bond (44) is arranged between the LED and the support structure (42). The solder bond (44) secures the LED to the support structure (42).Type: GrantFiled: June 22, 2004Date of Patent: March 13, 2007Assignee: GELcore, LLCInventors: Shawn R. Gibb, Robert F. Karlicek, Prosanto K. Mukerji, Hari S. Venugopalan, Ivan Eliashevich
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Patent number: 7179670Abstract: A light emitting diode (10) has a backside and a front-side with at least one n-type electrode (14) and at least one p-type electrode (12) disposed thereon defining a minimum electrodes separation (delectrodes). A bonding pad layer (50) includes at least one n-type bonding pad (64) and at least one p-type bonding pad (62) defining a minimum bonding pads separation (dpads) that is larger than the minimum electrodes separation (delectrodes). At least one fanning layer (30) interposed between the front-side of the light emitting diode (10) and the bonding pad layer (50) includes a plurality of electrically conductive paths passing through vias (34, 54) of a dielectric layer (32, 52) to provide electrical communication between the at least one n-type electrode (14) and the at least one n-type bonding pad (64) and between the at least one p-type electrode (12) and the at least one p-type bonding pad (62).Type: GrantFiled: March 5, 2004Date of Patent: February 20, 2007Assignee: GELcore, LLCInventors: Bryan S. Shelton, Sebastien Libon, Hari S. Venugopalan, Ivan Eliashevich, Stanton E. Weaver, Jr., Chen-Lun Hsing Chen, Thomas F. Soules, Steven LeBoeuf, Stephen Arthur
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Patent number: 7141828Abstract: A p-type contact (30) is disclosed for flip chip bonding and electrically contacting a p-type group III-nitride layer (28) of a group III-nitride flip chip light emitting diode die (10) with a bonding pad (60). A first palladium layer (42) is disposed on the p-type group III-nitride layer (28). The first palladium layer (42) is diffused through a native oxide of the p-type group III-nitride layer (28) to make electrical contact with the p-type group III-nitride layer (28). A reflective silver layer (44) is disposed on the first palladium layer (42). A second palladium layer (46) is disposed on the silver layer (44). A bonding stack (48) including at least two layers (50, 52, 54) is disposed on the second palladium layer (46). The bonding stack (48) is adapted for flip chip bonding the p-type layer (28) to the bonding pad (60).Type: GrantFiled: March 19, 2003Date of Patent: November 28, 2006Assignee: GELcore, LLCInventor: Hari S. Venugopalan
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Patent number: 7125734Abstract: In a method for fabricating a flip-chip light emitting diode device, a submount wafer is populated with a plurality of the light emitting diode dies. Each device die is flip-chip bonded to the submount. Subsequent to the flip-chip bonding, a growth substrate is removed. The entire submount is immersed in the etchant solution, exposed to the light for a prespecified period of time, removed from the solution, dried and diced into a plurality of LEDs. The LEDs are immediately packaged without any further processing.Type: GrantFiled: March 9, 2005Date of Patent: October 24, 2006Assignee: GELcore, LLCInventors: Michael J. Sackrison, Hari S. Venugopalan, Xiang Gao
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Patent number: 7064356Abstract: A flip chip light emitting diode (12) includes a light-transmissive substrate (10) with a base semiconducting layer (40) disposed thereupon. A conductive mesh (18) is disposed on the base semiconducting layer (40) and is in electrically conductive contact therewith. Light-emitting micromesas (30) are disposed in openings (20) of the conductive mesh (18). Each light emitting micromesa (30) has a topmost layer (46) of a second conductivity type that is opposite the first conductivity type. A first conductivity type electrode (14) is disposed on the base semiconducting layer (40) and is in electrical communication with the electrically conductive mesh (18). An insulating layer (60) is disposed over the electrically conductive mesh (18). A second conductivity type electrode layer (24) is disposed over the insulating layer (60) and the light-emitting micromesas (30). the insulating layer (60) insulates the second conductivity type electrode layer (24) from the electrically conductive mesh (18).Type: GrantFiled: April 16, 2004Date of Patent: June 20, 2006Assignee: GELcore, LLCInventors: Emil P. Stefanov, Hari S. Venugopalan, Bryan S. Shelton, Ivan Eliashevich
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Patent number: 7022550Abstract: A flip-chip LED device (10) includes a plurality of group III-nitride semiconductor layers (22) defining a p/n junction and including a top p-type group III-nitride layer (28), and a p-contact (30, 30?, 30?) for flip-chip bonding the top p-type group III-nitride layer. The p-contact includes an aluminum layer (32) disposed on the top p-type group III-nitride layer (28), and an interface layer (40, 66, 72, 80) disposed between the aluminum layer and the top p-type group III-nitride layer. The interface layer reduces a contact resistance between the aluminum layer (32) and the top p-type group III-nitride layer (28). The interface layer comprises one or more group III-nitride layers.Type: GrantFiled: April 7, 2004Date of Patent: April 4, 2006Assignee: GELcore LLCInventor: Hari S. Venugopalan
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Publication number: 20040232439Abstract: A light-emitting element (24) is disclosed. A light emitting diode (LED) includes a sapphire substrate (26) having front and back sides (33, 35), and a plurality of semiconductor layers (28, 30, 32) deposited on the front side (33) of the sapphire substrate (26). The semiconductor layers (28, 30, 32) define a light-emitting structure that emits light responsive to an electrical input. A metallization stack (40) includes an adhesion layer (34) deposited on the back side (35) of the sapphire substrate (26), and a solderable layer (38) connected to the adhesion layer (34) such that the solderable layer (38) is secured to the sapphire substrate (26) by the adhesion layer (34). A support structure (42) is provided on which the LED is disposed. A solder bond (44) is arranged between the LED and the support structure (42). The solder bond (44) secures the LED to the support structure (42).Type: ApplicationFiled: June 22, 2004Publication date: November 25, 2004Applicant: GELcore LLC.Inventors: Shawn R. Gibb, Robert F. Karlicek, Prosanto K. Mukerji, Hari S. Venugopalan, Ivan Eliashevich
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Publication number: 20040201110Abstract: A flip chip light emitting diode die (12) includes a light-transmissive substrate (20) and a plurality of semiconductor layers (22) are disposed on the light-transmissive substrate (20). The semiconductor layers (22) define a light-generating p/n junction. An electrode (30) is formed on the semiconductor layers (22) for flip-chip bonding the diode die (12) to an associated mount (14). The electrode (30) includes an optically transparent layer (42) formed of a substantially optically transparent material adjacent to the semiconductor layers (22) that makes ohmic contact therewith, and a reflective layer (44) adjacent to the optically transparent layer (42) and in electrically conductive communication therewith.Type: ApplicationFiled: April 9, 2003Publication date: October 14, 2004Applicant: EMCORE CORPORATIONInventors: Hari S. Venugopalan, Ivan Eliashevich
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Publication number: 20040182914Abstract: A p-type contact (30) is disclosed for flip chip bonding and electrically contacting a p-type group III-nitride layer (28) of a group III-nitride flip chip light emitting diode die (10) with a bonding pad (60). A first palladium layer (42) is disposed on the p-type group III-nitride layer (28). The first palladium layer (42) is diffused through a native oxide of the p-type group III-nitride layer (28) to make electrical contact with the p-type group III-nitride layer (28). A reflective silver layer (44) is disposed on the first palladium layer (42). A second palladium layer (46) is disposed on the silver layer (44). A bonding stack (48) including at least two layers (50, 52, 54) is disposed on the second palladium layer (46). The bonding stack (48) is adapted for flip chip bonding the p-type layer (28) to the bonding pad (60).Type: ApplicationFiled: March 19, 2003Publication date: September 23, 2004Applicant: EMCORE CORPORATIONInventor: Hari S. Venugopalan
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Patent number: 6787435Abstract: A light-emitting element (24) is disclosed. A light emitting diode (LED) includes a sapphire substrate (26) having front and back sides (33, 35), and a plurality of semiconductor layers (28, 30, 32) deposited on the front side (33) of the sapphire substrate (26). The semiconductor layers (28, 30, 32) define a light-emitting structure that emits light responsive to an electrical input. A metallization stack (40) includes an adhesion layer (34) deposited on the back side (35) of the sapphire substrate (26), and a solderable layer (38) connected to the adhesion layer (34) such that the solderable layer (38) is secured to the sapphire substrate (26) by the adhesion layer (34). A support structure (42) is provided on which the LED is disposed. A solder bond (44) is arranged between the LED and the support structure (42). The solder bond (44) secures the LED to the support structure (42).Type: GrantFiled: July 5, 2002Date of Patent: September 7, 2004Assignee: GELcore LLCInventors: Shawn R. Gibb, Robert F. Karlicek, Prosanto K. Mukerji, Hari S. Venugopalan, Ivan Eliashevich
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Publication number: 20030010975Abstract: A light-emitting element (24) is disclosed. A light emitting diode (LED) includes a sapphire substrate (26) having front and back sides (33, 35), and a plurality of semiconductor layers (28, 30, 32) deposited on the front side (33) of the sapphire substrate (26). The semiconductor layers (28, 30, 32) define a light-emitting structure that emits light responsive to an electrical input. A metallization stack (40) includes an adhesion layer (34) deposited on the back side (35) of the sapphire substrate (26), and a solderable layer (38) connected to the adhesion layer (34) such that the solderable layer (38) is secured to the sapphire substrate (26) by the adhesion layer (34). A support structure (42) is provided on which the LED is disposed. A solder bond (44) is arranged between the LED and the support structure (42). The solder bond (44) secures the LED to the support structure (42).Type: ApplicationFiled: July 5, 2002Publication date: January 16, 2003Applicant: GELcore LLCInventors: Shawn R. Gibb, Robert F. Karlicek, Prosanto K. Mukerji, Hari S. Venugopalan, Ivan Eliashevich