Abstract: A programmable error-correction decoder embodied in an integrated circuit and error correction decoding method that performs high-speed error correction for digital communication channels and digital data storage applications. The decoder carries out error detection and correction for digital data in a variety of data transmission and storage applications. The decoder has three basic modules, including a syndrome computation module, a Berlekamp-Massey computation module, and a Chien-Forney module. The syndrome computation module calculates syndromes which are intermediate values required to find error locations and values. The Berlekamp-Massey module implements a Berlekamp-Massey algorithm that converts the syndromes to intermediate results known as lambda (&Lgr;) and omega (&OHgr;) polynomials. The Chien-Forney module uses modified Chien-search and Forney algorithms to calculate actual error locations and error values.