Patents by Inventor Hari U. Krishnan

Hari U. Krishnan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Transmitting data between regions of varying safety integrity levels in a system on a chip
    Patent number: 11573856
    Abstract: In various examples, a system includes a memory operating within a first risk level and circuitry operating within a second risk level that indicates more risk than the first risk level. The circuitry reads and/or writes data to a first memory address within the memory, and reads and/or writes an error detection code to a second memory address within the memory.
    Type: Grant
    Filed: September 16, 2021
    Date of Patent: February 7, 2023
    Assignee: NVIDIA CORPORATION
    Inventors: Michael Ditty, Hari U. Krishnan, Padam Patt Krishnani, Jyotirmaya Swain, Anirban Ghosh, Shraddha Manohar Gondkar, Avinash J V, Phanikumar Parvatham
  • TRANSMITTING DATA BETWEEN REGIONS OF VARYING SAFETY INTEGRITY LEVELS IN A SYSTEM ON A CHIP
    Publication number: 20230036130
    Abstract: In various examples, a system includes a memory operating within a first risk level and circuitry operating within a second risk level that indicates more risk than the first risk level. The circuitry reads and/or writes data to a first memory address within the memory, and reads and/or writes an error detection code to a second memory address within the memory.
    Type: Application
    Filed: September 16, 2021
    Publication date: February 2, 2023
    Inventors: Michael Ditty, Hari U. Krishnan, Padam Patt Krishnani, Jyotirmaya Swain, Anirban Ghosh, Shraddha Manohar Gondkar, Avinash J V, Phanikumar Parvatham
  • Data path controller with integrated power management to manage power consumption of a computing device and its components
    Patent number: 8069355
    Abstract: A data path controller, a computer device, an apparatus and a method are disclosed for integrating power management functions into a data path controller to manage power consumed by processors and peripheral devices. By embedding power management within the data path controller, the data path controller can advantageously modify its criteria in-situ so that it can adapt its power management actions in response to changes in processors and peripheral devices. In addition, the data path controller includes a power-managing interface that provides power-monitoring ports for monitoring and/or quantifying power consumption of various components. In one embodiment, the data path controller includes a power-monitoring interface for selectably monitoring power of a component.
    Type: Grant
    Filed: December 23, 2008
    Date of Patent: November 29, 2011
    Assignee: NVIDIA Corporation
    Inventors: Brad W. Simeral, David G. Reed, Dmitry Vyshetsky, Roman Surgutchik, Robert William Chapman, Joshua Titus, Anand Srinivasan, Hari U. Krishnan
  • Data Path Controller With Integrated Power Management to Manage Power Consumption of a Computing Device and its Components
    Publication number: 20090150689
    Abstract: A data path controller, a computer device, an apparatus and a method are disclosed for integrating power management functions into a data path controller to manage power consumed by processors and peripheral devices. By embedding power management within the data path controller, the data path controller can advantageously modify its criteria in-situ so that it can adapt its power management actions in response to changes in processors and peripheral devices. In addition, the data path controller includes a power-managing interface that provides power-monitoring ports for monitoring and/or quantifying power consumption of various components. In one embodiment, the data path controller includes a power-monitoring interface for selectably monitoring power of a component.
    Type: Application
    Filed: December 23, 2008
    Publication date: June 11, 2009
    Inventors: Brad W. Simeral, David C. Reed, Dmitry Vyshetsky, Roman Surgutchick, Robert William Chapman, Joshua Titus, Anand Srinivasan, Hari U. Krishnan
  • Data path controller with integrated power management to manage power consumption of a computing device and its components
    Patent number: 7487371
    Abstract: A data path controller, a computer device, an apparatus and a method are disclosed for integrating power management functions into a data path controller to manage power consumed by processors and peripheral devices. By embedding power management within the data path controller, the data path controller can advantageously modify its criteria in-situ so that it can adapt its power management actions in response to changes in processors and peripheral devices. In addition, the data path controller includes a power-managing interface that provides power-monitoring ports for monitoring and/or quantifying power consumption of various components. In one embodiment, the data path controller includes a power-monitoring interface for selectably monitoring power of a component.
    Type: Grant
    Filed: December 16, 2005
    Date of Patent: February 3, 2009
    Assignee: Nvidia Corporation
    Inventors: Brad W. Simeral, David G. Reed, Dmitry Vyshetsky, Roman Surgutchick, Robert William Chapman, Joshua Titus, Anand Srinivasan, Hari U. Krishnan