Patents by Inventor Harini SIDDAIAH

Harini SIDDAIAH has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Packed terminal transistors
    Patent number: 12113017
    Abstract: A die includes fins extending in a first direction, a gate formed over the fins, the gate extending in a second direction that is perpendicular to the first direction, a first source/drain contact layer formed over the fins and extending in the second direction, and a second source/drain contact layer formed over the fins and extending in the second direction, wherein the first source/drain contact layer and the second source/drain contact layer are on opposite sides of the gate. The die also includes a first source/drain metal layer electrically coupled to the first source/drain contact layer, and a second source/drain metal layer electrically coupled to the second source/drain contact layer, wherein the first source/drain metal layer and the second source/drain metal layer do not overlap one or more of the fins.
    Type: Grant
    Filed: February 17, 2022
    Date of Patent: October 8, 2024
    Assignee: QUALCOMM INCORPORATED
    Inventors: Thomas Hua-Min Williams, Khaja Ahmad Shaik, Jeongah Park, Rinoj Thomas, Harini Siddaiah, Raj Kumar
  • PACKED TERMINAL TRANSISTORS
    Publication number: 20230260903
    Abstract: A die includes fins extending in a first direction, a gate formed over the fins, the gate extending in a second direction that is perpendicular to the first direction, a first source/drain contact layer formed over the fins and extending in the second direction, and a second source/drain contact layer formed over the fins and extending in the second direction, wherein the first source/drain contact layer and the second source/drain contact layer are on opposite sides of the gate. The die also includes a first source/drain metal layer electrically coupled to the first source/drain contact layer, and a second source/drain metal layer electrically coupled to the second source/drain contact layer, wherein the first source/drain metal layer and the second source/drain metal layer do not overlap one or more of the fins.
    Type: Application
    Filed: February 17, 2022
    Publication date: August 17, 2023
    Inventors: Thomas Hua-Min WILLIAMS, Khaja Ahmad SHAIK, JeongAh PARK, Rinoj THOMAS, Harini SIDDAIAH, Raj KUMAR