Patents by Inventor Hariprakash
Hariprakash has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240144648Abstract: The following relates generally to (i) identifying a type of countertop in a home, and/or (ii) using a type of countertop to estimate a value of a home and/or determine a homeowners insurance premium. In some embodiments, one or more processors receive a first plurality of images including depictions of countertops, and train a countertop identification machine learning algorithm based upon the first plurality of images. The one or more processors may then receive a second plurality of images, which (i) includes a greater number of images than the first plurality of images, and (ii) includes labeled objects. The one or more processors may then further train the countertop identification machine learning algorithm based upon the second plurality of images.Type: ApplicationFiled: January 13, 2023Publication date: May 2, 2024Inventors: Geetha Priya Nagarajan, Hariprakash Taniga Ejilane, Reuven Bimbaum, Anjela Spreen
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Patent number: 11459338Abstract: The compounds of Formula I, Formula Ia, and Formula Ib are described herein along with their analogs, tautomeric forms, stereoisomers, polymorphs, hydrates, solvates, pharmaceutically acceptable salts, pharmaceutical compositions, metabolites, and prodrugs thereof. These compounds inhibit PRMT5 and are useful as therapeutic or ameliorating agent for diseases that are involved in cellular growth such as malignant tumors, schizophrenia, Alzheimer's disease, Parkinson's disease and the like.Type: GrantFiled: November 23, 2018Date of Patent: October 4, 2022Assignee: JUBILANT EPISCRIBE LLCInventors: Saravanan Vadivelu, Sridharan Rajagopal, Raghunadha Reddy Burri, Shivani Garapaty, Dhanalakshmi Sivanandhan, Manish Kumar Thakur, Tamizharasan Natarajan, Indu N Swamy, Nagendra Nagaraju, Subramaniam Kanagaraj, Zainuddin Mohd, Sayantani Sarkar, Swapan Kumar Samanta, Hariprakash
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Publication number: 20210371431Abstract: The compounds of Formula I, Formula Ia, and Formula Ib are described herein along with their analogs, tautomeric forms, stereoisomers, polymorphs, hydrates, solvates, pharmaceutically acceptable salts, pharmaceutical compositions, metabolites, and prodrugs thereof. These compounds inhibit PRMT5 and are useful as therapeutic or ameliorating agent for diseases that are involved in cellular growth such as malignant tumors, schizophrenia, Alzheimer's disease, Parkinson's disease and the like.Type: ApplicationFiled: November 23, 2018Publication date: December 2, 2021Inventors: Saravanan VADIVELU, Sridharan RAJAGOPAL, Raghunadha Reddy BURRI, Shivani GARAPATY, Dhanalakshmi SIVANANDHAN, Manish Kumar THAKUR, Tamizharasan NATARAJAN, Indu N SWAMY, Nagendra NAGARAJU, Subramaniam KANAGARAJ, Zainuddin MOHD, Sayantani SARKAR, Swapan Kumar SAMANTA, Hariprakash N/A
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Patent number: 11099971Abstract: An automated end-to-end analysis of customer service requests is disclosed. A core dump is received, wherein the core dump corresponds to a customer service request regarding a crash of a computer system. A processor automatically analyzes the core dump to determine if a pcpu lockup of the computer system is due to a software issue. Provided the pcpu lockup of the computer system is due to the software issue, the processor determines which thread is a culprit thread responsible for the pcpu lockup of the computer system.Type: GrantFiled: June 3, 2019Date of Patent: August 24, 2021Assignee: VMware, Inc.Inventors: Sowgandh Sunil Gadi, Hariprakash Govindarajalu
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Publication number: 20190286545Abstract: An automated end-to-end analysis of customer service requests is disclosed. A core dump is received, wherein the core dump corresponds to a customer service request regarding a crash of a computer system. A processor automatically analyzes the core dump to determine if a pcpu lockup of the computer system is due to a software issue. Provided the pcpu lockup of the computer system is due to the software issue, the processor determines which thread is a culprit thread responsible for the pcpu lockup of the computer system.Type: ApplicationFiled: June 3, 2019Publication date: September 19, 2019Applicant: VMware, Inc.Inventors: Sowgandh Sunil GADI, Hariprakash GOVINDARAJALU
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Patent number: 10331546Abstract: An automated end-to-end analysis of customer service requests is disclosed. A core dump is received, wherein the core dump corresponds to a customer service request regarding a crash of a computer system. A processor automatically analyzes the core dump to determine if a pcpu lockup of the computer system is due to a software issue. Provided the pcpu lockup of the computer system is due to the software issue, the processor determines which thread is a culprit thread responsible for the pcpu lockup of the computer system.Type: GrantFiled: January 25, 2017Date of Patent: June 25, 2019Assignee: VMware, Inc.Inventors: Sowgandh Sunil Gadi, Hariprakash Govindarajalu
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Publication number: 20170371766Abstract: An automated end-to-end analysis of customer service requests is disclosed. A core dump is received, wherein the core dump corresponds to a customer service request regarding a crash of a computer system. A processor automatically analyzes the core dump to determine if a pcpu lockup of the computer system is due to a software issue. Provided the pcpu lockup of the computer system is due to the software issue, the processor determines which thread is a culprit thread responsible for the pcpu lockup of the computer system.Type: ApplicationFiled: January 25, 2017Publication date: December 28, 2017Applicant: VMware, Inc.Inventors: Sowgandh Sunil GADI, Hariprakash GOVINDARAJALU
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Patent number: 9842043Abstract: A system for testing a software application includes (a) a memory unit includes a database and a set of modules; and (b) a processor that executes the set of modules. The set of modules include (i) a test case module that processes an input received from a user through a first user interface view of an electronic document; (ii) a test action module that processes an input includes (a) keywords in a second user interface view of the electronic document, and (b) unique identification number for each of the one or more test action, (iii) a test case execution module that executes the test case by executing the one or more action item; (iv) a comparison module that compare the obtained test case execution result with a predetermined result; and (v) a validation module that validate the software application based on the comparison.Type: GrantFiled: February 17, 2015Date of Patent: December 12, 2017Inventor: Hariprakash Agrawal
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Patent number: 9552250Abstract: Discovering a hardware failure in a processor is disclosed. When an operating system or application fails, a function containing the instruction that failed along with the register set of the CPU at the failure is recorded. The function is analyzed into its basic blocks. The failing instruction, the failing basic block, the definitions that reach the failing instruction, and the CPU register set at the failure provide information to determine whether the failure was caused by hardware or software. If, after a complete search of the definitions reaching the failing instruction, the search discovers a first definition defining the failing instruction and a second definition defining the first definition such that the second definition reaches the failing instruction and the first definition assigns a register value that does not match a register value in the failing instruction, then a hardware failure is the cause of the crash.Type: GrantFiled: March 26, 2015Date of Patent: January 24, 2017Assignee: VMware, Inc.Inventors: Hariprakash Govindarajalu, Yujie Chen, Sowgandh Sunil Gadi, Ravi Parimi
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Publication number: 20160283301Abstract: Discovering a hardware failure in a processor is disclosed. When an operating system or application fails, a function containing the instruction that failed along with the register set of the CPU at the failure is recorded. The function is analyzed into its basic blocks. The failing instruction, the failing basic block, the definitions that reach the failing instruction, and the CPU register set at the failure provide information to determine whether the failure was caused by hardware or software. If, after a complete search of the definitions reaching the failing instruction, the search discovers a first definition defining the failing instruction and a second definition defining the first definition such that the second definition reaches the failing instruction and the first definition assigns a register value that does not match a register value in the failing instruction, then a hardware failure is the cause of the crash.Type: ApplicationFiled: March 26, 2015Publication date: September 29, 2016Inventors: Hariprakash GOVINDARAJALU, Yujie CHEN, Sowgandh Sunil GADI, Ravi PARIMI
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Publication number: 20150234734Abstract: A system for testing a software application includes (a) a memory unit includes a database and a set of modules; and (b) a processor that executes the set of modules.Type: ApplicationFiled: February 17, 2015Publication date: August 20, 2015Inventor: Hariprakash Agrawal
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Publication number: 20090269658Abstract: The present invention provides a method for manufacture of a grid structure for use in lead acid batteries using a substrate having low density and low melting point, the method comprising coating the substrate material with a first metal layer and a subsequent metal layer of lead/lead alloy and electrodepositing an electroconductive polymer to form a protective layer thereon.Type: ApplicationFiled: December 31, 2004Publication date: October 29, 2009Inventors: Ashok K. Shukla, Surendra Kumar Martha, Bellie Hariprakash, Shaik Abdul Gaffoor, Dinesh Chandra Trivedi
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Patent number: 7509533Abstract: A computerized device having a first processing device, a second processing device, and an interconnection mechanism allowing communication between the first and second processing devices, provides a mechanism for testing a processing device by performing the isolation and testing operations of operating the first processing device in a normal processing mode and transitioning the first processing device from the normal processing mode to an isolated processing mode. The device performs a test process on the first processing device while in isolated processing mode to test functional portions of the first processing device. If operation of the test process produces an error in a functional portion of the first processing device, the test process notifies a control process on a second processing device of the error in the functional portion of the first processing device in which the test process produced an error.Type: GrantFiled: June 30, 2003Date of Patent: March 24, 2009Assignee: Sun Microsystems, Inc.Inventor: Hariprakash Govindarajalu
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Patent number: 7412475Abstract: Embodiments of the invention are directed to circuits and techniques for computer processor register integrity checking employing digital roots, and hexadecimal digital roots (HDRs) in particular, to validate the results of arithmetic operations and register moves. These circuits thus provide extra confidence that register operations were correctly executed. A hexadecimal digital root is computed for the result of each register computation and compared to the results of the same computation performed on the HDRs of the operands. The hexadecimal digital root approach may be simply implemented with standard combinatoric logic. Validation is accomplished in a single clock cycle so that there is no added system delay or latency. The circuits and methods described herein have comparatively little impact on processor real estate.Type: GrantFiled: March 23, 2004Date of Patent: August 12, 2008Assignee: Sun Microsystems, Inc.Inventor: Hariprakash Govindarajalu
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Patent number: 6889410Abstract: A precursor chemical compound is applied to a surface sought to be coated, and subjected to a rapid thermally activated chemical reaction process (RTACRP) in which the temperature is quickly raised and lowered. The desired coating is formed from the precursor chemical compound by a chemical reaction at the elevated temperature. The structural/chemical integrity of the surface is preserved due to the use of RTACRP. The approach may be used to manufacture a high-energy density lead-acid battery.Type: GrantFiled: January 31, 2003Date of Patent: May 10, 2005Assignee: Indian Institute of ScienceInventors: Srinivasarao Shivashankar, Ashok Kumar Shukla, Anil Uttam Mane, Bellie Hariprakash, Shaik Abdul Gaffoor
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Publication number: 20040151982Abstract: A precursor chemical compound is applied to a surface sought to be coated, and subjected to a rapid thermally activated chemical reaction process (RTACRP) in which the temperature is quickly raised and lowered. The desired coating is formed from the precursor chemical compound by a chemical reaction at the elevated temperature. The structural/chemical integrity of the surface is preserved due to the use of RTACRP. The approach may be used to manufacture a high-energy density lead-acid battery.Type: ApplicationFiled: January 31, 2003Publication date: August 5, 2004Applicant: Indian Institute of ScienceInventors: Srinivasarao Shivashankar, Ashok Kumar Shukla, Anil Uttam Mane, Bellie Hariprakash, Shaik Abdul Gaffoor