Patents by Inventor Hariprasath Venkatram

Hariprasath Venkatram has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Dual power I/O transmitter
    Patent number: 10923164
    Abstract: An apparatus is provided which comprises: a first power supply rail to provide a first power supply; second and third power supply rails to provide second and third power supplies, respectively, wherein a voltage level of the first power supply is higher than a voltage level of each of the second and third power supplies; a first driver circuitry coupled to the first power supply rail and the second power supply rail; a second driver circuitry coupled to the third power supply rail, and coupled to the first driver circuitry; and a stack of transistors of N conductivity type coupled to the first power supply rail, and to the second driver circuitry.
    Type: Grant
    Filed: September 29, 2018
    Date of Patent: February 16, 2021
    Assignee: Intel Corporation
    Inventors: Hariprasath Venkatram, Mohammed G. Mostofa, Rajesh Inti, Roger K. Cheng, Aaron Martin, Christopher Mozak, Pavan Kumar Kappagantula, Hsien-Pao Yang, Mozhgan Mansuri, James Jaussi, Harishankar Sridharan
  • Low power high speed receiver with reduced decision feedback equalizer samplers
    Patent number: 10756931
    Abstract: Described is an apparatus which comprises: a Variable Gain Amplifier (VGA); a set of samplers to sample data output from the VGA according to a clock signal; and a Clock Data Recovery (CDR) circuit to adjust phase of the clock signal such that magnitude of a first post-cursor signal associated with the sampled data is substantially half of a magnitude of a primary cursor tap associated with the sampled data.
    Type: Grant
    Filed: June 25, 2019
    Date of Patent: August 25, 2020
    Assignee: Intel Corporation
    Inventors: Tawfiq Musah, Hariprasath Venkatram, Bryan K. Casper
  • DUAL POWER I/O TRANSMITTER
    Publication number: 20200105317
    Abstract: An apparatus is provided which comprises: a first power supply rail to provide a first power supply; second and third power supply rails to provide second and third power supplies, respectively, wherein a voltage level of the first power supply is higher than a voltage level of each of the second and third power supplies; a first driver circuitry coupled to the first power supply rail and the second power supply rail; a second driver circuitry coupled to the third power supply rail, and coupled to the first driver circuitry; and a stack of transistors of N conductivity type coupled to the first power supply rail, and to the second driver circuitry.
    Type: Application
    Filed: September 29, 2018
    Publication date: April 2, 2020
    Applicant: Intel Corporation
    Inventors: Hariprasath VENKATRAM, Mohammed G. MOSTOFA, Rajesh INTI, Roger K. CHENG, Aaron MARTIN, Christopher MOZAK, Pavan Kumar KAPPAGANTULA, Hsien-Pao YANG, Mozhgan MANSURI, James JAUSSI, Harishankar SRIDHARAN
  • LOW POWER HIGH SPEED RECEIVER WITH REDUCED DECISION FEEDBACK EQUALIZER SAMPLERS
    Publication number: 20190312756
    Abstract: Described is an apparatus which comprises: a Variable Gain Amplifier (VGA); a set of samplers to sample data output from the VGA according to a clock signal; and a Clock Data Recovery (CDR) circuit to adjust phase of the clock signal such that magnitude of a first post-cursor signal associated with the sampled data is substantially half of a magnitude of a primary cursor tap associated with the sampled data.
    Type: Application
    Filed: June 25, 2019
    Publication date: October 10, 2019
    Applicant: Intel Corporation
    Inventors: Tawfiq Musah, Hariprasath Venkatram, Bryan K. Casper
  • Low power high speed receiver with reduced decision feedback equalizer samplers
    Patent number: 10341145
    Abstract: Described is an apparatus which comprises: a Variable Gain Amplifier (VGA); a set of samplers to sample data output from the VGA according to a clock signal; and a Clock Data Recovery (CDR) circuit to adjust phase of the clock signal such that magnitude of a first post-cursor signal associated with the sampled data is substantially half of a magnitude of a primary cursor tap associated with the sampled data.
    Type: Grant
    Filed: March 3, 2015
    Date of Patent: July 2, 2019
    Assignee: Intel Corporation
    Inventors: Tawfiq Musah, Hariprasath Venkatram, Bryan K. Casper
  • High speed receiver with one-hot decision feedback equalizer
    Patent number: 9537682
    Abstract: Described is an apparatus which comprises: an amplifier; a first set of samplers to sample data output from the amplifier according to a clock signal, the set of samplers to generate an output; and a converter to convert the output of the first set of samplers to 1 -hot encoded data.
    Type: Grant
    Filed: March 17, 2015
    Date of Patent: January 3, 2017
    Assignee: Intel Corporation
    Inventors: Hariprasath Venkatram, Sami Hyvonen, Tawfiq Musah, Bryan K. Casper
  • HIGH SPEED RECEIVER WITH ONE-HOT DECISION FEEDBACK EQUALIZER
    Publication number: 20160277219
    Abstract: Described is an apparatus which comprises: an amplifier; a first set of samplers to sample data output from the amplifier according to a clock signal, the set of samplers to generate an output; and a converter to convert the output of the first set of samplers to 1 -hot encoded data.
    Type: Application
    Filed: March 17, 2015
    Publication date: September 22, 2016
    Inventors: Hariprasath Venkatram, Sami Hyvonen, Tawfiq Musah, Bryan K. Casper
  • LOW POWER HIGH SPEED RECEIVER WITH REDUCED DECISION FEEDBACK EQUALIZER SAMPLERS
    Publication number: 20160261435
    Abstract: Described is an apparatus which comprises: a Variable Gain Amplifier (VGA); a set of samplers to sample data output from the VGA according to a clock signal; and a Clock Data Recovery (CDR) circuit to adjust phase of the clock signal such that magnitude of a first post-cursor signal associated with the sampled data is substantially half of a magnitude of a primary cursor tap associated with the sampled data.
    Type: Application
    Filed: March 3, 2015
    Publication date: September 8, 2016
    Inventors: Tawfiq Musah, Hariprasath Venkatram, Bryan K. Casper