Patents by Inventor Harish Bhat

Harish Bhat has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240429453
    Abstract: Expanded temperature range electrolytes for lithium-ion batteries using sulfone eutectic mixtures include 1 wt % to 5 wt % of a first component that includes vinylene carbonate (VC); and 95 wt % to 99 wt % of a second component that includes a 0.5 M to 1.5 M solution of LiPF6 in a mixture that includes ethyl methyl sulfone (EMS); dimethyl sulfone (DMS); ethylene carbonate (EC); and ethyl methyl carbonate (EMC). A ratio of a total weight of EMS and DMS to a total weight of EC to a total weight of EMC is in a range of 1:1:5 to 2:2:10, and the EMS and DMS are present in a ratio of 80 mol % to 90 mol % of EMS to 20 mol % to 10 mol % of DMS.
    Type: Application
    Filed: June 14, 2024
    Publication date: December 26, 2024
    Inventors: Candace Chan, Mulki Harish Bhat, Charles Austen Angell
  • Patent number: 8692629
    Abstract: An apparatus and method for outputting high-frequency, high-power signals from low-frequency, low-power input is disclosed. The apparatus and method may provide a two-dimensional nonlinear lattice having a plurality of inductors and voltage-dependent capacitors intersecting at a plurality of nodes. Two or more adjacent boundaries of the nonlinear lattice may be provided with input signals which constructively interfere to output a signal of substantially higher amplitude and higher frequency than those of the input signals.
    Type: Grant
    Filed: May 19, 2009
    Date of Patent: April 8, 2014
    Assignee: Cornell University
    Inventors: Ehsan Afshari, Harish Bhat
  • Publication number: 20110194324
    Abstract: An apparatus and method for outputting high-frequency, high-power signals from low-frequency, low-power input is disclosed. The apparatus and method may provide a two-dimensional nonlinear lattice having a plurality of inductors and voltage-dependent capacitors intersecting at a plurality of nodes. Two or more adjacent boundaries of the nonlinear lattice may be provided with input signals which constructively interfere to output a signal of substantially higher amplitude and higher frequency than those of the input signals.
    Type: Application
    Filed: May 19, 2009
    Publication date: August 11, 2011
    Applicant: Cornell University
    Inventors: Ehsan Afshari, Harish Bhat
  • Patent number: 7671702
    Abstract: A power combiner comprising an LC lattice structure is shown, together with a method for generating a planar wave front. The LC structure can comprise constant or voltage dependent capacitors. Either the delay or the characteristic impedance of the two-dimensional transmission line formed by the LC lattice structure are kept constant. A planar wave propagating along one direction of the transmission line gradually experiences higher impedances at the edges, creating a lower resistance path for the current in the middle. This funnels more power to the center as the wave propagates.
    Type: Grant
    Filed: October 16, 2008
    Date of Patent: March 2, 2010
    Assignee: California Institute of Technology
    Inventors: Ehsan Afshari, Harish Bhat, Seyed Ali Hajimiri
  • Publication number: 20090096554
    Abstract: A power combiner comprising an LC lattice structure is shown, together with a method for generating a planar wave front. The LC structure can comprise constant or voltage dependent capacitors. Either the delay or the characteristic impedance of the two-dimensional transmission line formed by the LC lattice structure are kept constant. A planar wave propagating along one direction of the transmission line gradually experiences higher impedances at the edges, creating a lower resistance path for the current in the middle. This funnels more power to the center as the wave propagates.
    Type: Application
    Filed: October 16, 2008
    Publication date: April 16, 2009
    Inventors: Ehsan Afshari, Harish Bhat, Seyed Ali Hajimiri
  • Patent number: 7456704
    Abstract: A power combiner comprising an LC lattice structure is shown, together with a method for generating a planar wave front. The LC structure can comprise constant or voltage dependent capacitors. Either the delay or the characteristic impedance of the two-dimensional transmission line formed by the LC lattice structure are kept constant. A planar wave propagating along one direction of the transmission line gradually experiences higher impedances at the edges, creating a lower resistance path for the current in the middle. This funnels more power to the center as the wave propagates.
    Type: Grant
    Filed: April 28, 2006
    Date of Patent: November 25, 2008
    Assignee: California Institute of Technology
    Inventors: Ehsan Afshari, Harish Bhat, Seyed Ali Hajimi{grave over (r)}i
  • Publication number: 20070030102
    Abstract: A power combiner comprising an LC lattice structure is shown, together with a method for generating a planar wave front. The LC structure can comprise constant or voltage dependent capacitors. Either the delay or the characteristic impedance of the two-dimensional transmission line formed by the LC lattice structure are kept constant. A planar wave propagating along one direction of the transmission line gradually experiences higher impedances at the edges, creating a lower resistance path for the current in the middle. This funnels more power to the center as the wave propagates.
    Type: Application
    Filed: April 28, 2006
    Publication date: February 8, 2007
    Inventors: Ehsan Afshari, Harish Bhat, Seyed Hajimiri