Patents by Inventor HARISH G. KAMAT

HARISH G. KAMAT has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Systems and methods for bypass testing
    Patent number: 10788533
    Abstract: Technology for bypass testing of an integrated circuit using a testing device. The testing device comprising a port configured to connect to an integrated circuit before the integrated circuit is packaged into an end product. The testing device further comprising a controller with architecture configured to bypass a training process designed to be initiated when the integrated circuit is first connected to the port and the port is powered on, confirm a connection between the integrated circuit and the testing device, send a test pattern to the integrated circuit to execute; and receive results from the integrated circuit executing the test pattern.
    Type: Grant
    Filed: August 29, 2018
    Date of Patent: September 29, 2020
    Assignee: Intel Corporation
    Inventors: Kishore Kasichainula, Satheesh Chellappan, Lay Chen Ong, Harish G. Kamat
  • USB2 high speed connection for testing
    Patent number: 10606772
    Abstract: In one example a Universal Serial Bus (USB) controller comprises at least one memory register to store one or more enumeration parameters for a USB connection with the USB controller and logic, at least partially including hardware logic, to detect a USB connection with a remote device via the USB connection, retrieve one or more connection enumeration parameters for the USB connection from the at least one memory register on the USB host controller, and implement a connection enumeration process using the one or more connection enumeration parameters retrieved from the memory register on the USB controller. Other examples may be described.
    Type: Grant
    Filed: April 17, 2018
    Date of Patent: March 31, 2020
    Assignee: INTEL CORPORATION
    Inventors: Satheesh Chellappan, Kishore Kasichainula, Lay Cheng Ong, Chee Lim Poon, Harish G. Kamat
  • SYSTEMS AND METHODS FOR BYPASS TESTING
    Publication number: 20190101592
    Abstract: Technology for bypass testing of an integrated circuit using a testing device. The testing device comprising a port configured to connect to an integrated circuit before the integrated circuit is packaged into an end product. The testing device further comprising a controller with architecture configured to bypass a training process designed to be initiated when the integrated circuit is first connected to the port and the port is powered on, confirm a connection between the integrated circuit and the testing device, send a test pattern to the integrated circuit to execute; and receive results from the integrated circuit executing the test pattern.
    Type: Application
    Filed: August 29, 2018
    Publication date: April 4, 2019
    Applicant: Intel Corporation
    Inventors: Kishore Kasichainula, Satheesh Chellappan, Lay Chen Ong, Harish G. Kamat
  • USB2 HIGH SPEED CONNECTION FOR TESTING
    Publication number: 20190018802
    Abstract: In one example a Universal Serial Bus (USB) controller comprises at least one memory register to store one or more enumeration parameters for a USB connection with the USB controller and logic, at least partially including hardware logic, to detect a USB connection with a remote device via the USB connection, retrieve one or more connection enumeration parameters for the USB connection from the at least one memory register on the USB host controller, and implement a connection enumeration process using the one or more connection enumeration parameters retrieved from the memory register on the USB controller. Other examples may be described.
    Type: Application
    Filed: April 17, 2018
    Publication date: January 17, 2019
    Applicant: Intel Corporation
    Inventors: SATHEESH CHELLAPPAN, KISHORE KASICHAINULA, LAY CHENG ONG, CHEE LIM POON, HARISH G. KAMAT