Patents by Inventor Harish Kumar Shakamuri

Harish Kumar Shakamuri has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10614026
    Abstract: The present subject disclosure provides a switch architecture with data and control path systolic array that can be used for real time data analysis or Artificial Intelligence (AI) learning. A systolic array is described which analyzes the TLPs received by an uplink port and processes the TLPs according to pre-programmed rules. Then the TLP is forwarded to a destination port. The reverse operation is described as well.
    Type: Grant
    Filed: February 28, 2019
    Date of Patent: April 7, 2020
    Assignee: EXTEN TECHNOLOGIES, INC.
    Inventors: Harish Kumar Shakamuri, Ashwin Kamath, Michael Enz
  • Publication number: 20190197008
    Abstract: The present subject disclosure provides a switch architecture with data and control path systolic array that can be used for real time data analysis or Artificial Intelligence (AI) learning. A systolic array is described which analyzes the TLPs received by an uplink port and processes the TLPs according to pre-programmed rules. Then the TLP is forwarded to a destination port. The reverse operation is described as well.
    Type: Application
    Filed: February 28, 2019
    Publication date: June 27, 2019
    Inventors: Harish Kumar Shakamuri, Ashwin Kamath, Michael Enz
  • Patent number: 10261936
    Abstract: The present subject disclosure provides a PCIe switch architecture with data and control path systolic array that can be used for real time data analysis or Artificial Intelligence (AI) learning. A systolic array is described which analyzes the TLPs received by an uplink port and processes the TLPs according to pre-programmed rules. Then the TLP is forwarded to a destination port. The reverse operation is described as well.
    Type: Grant
    Filed: April 24, 2017
    Date of Patent: April 16, 2019
    Assignee: EXTEN Technologies, Inc.
    Inventors: Harish Kumar Shakamuri, Ashwin Kamath, Michael Enz
  • Publication number: 20180307648
    Abstract: The present subject disclosure provides a PCIe switch architecture with data and control path systolic array that can be used for real time data analysis or Artificial Intelligence (AI) learning. A systolic array is described which analyzes the TLPs received by an uplink port and processes the TLPs according to pre-programmed rules. Then the TLP is forwarded to a destination port. The reverse operation is described as well.
    Type: Application
    Filed: April 24, 2017
    Publication date: October 25, 2018
    Inventors: Harish Kumar Shakamuri, Ashwin Kamath, Michael Enz
  • Publication number: 20160028860
    Abstract: Methods and systems are provided for enabling existing or legacy network devices to handle packets defined in accordance with future-defined standards, without having to be re-configured to be compatible with these standards. A transmitting network device may generate packets, and may set in the packets indication fields (e.g., tag header type fields) to indicate when particular fields (e.g., tag header fields) are inserted into the packets, including unknown or newly-defined fields. The indication fields may enable a receiving device to handle the packets by skipping, when necessary, over these fields (e.g., including the unknown or newly-defined fields). The indication fields may, for example, identify for each packet a remaining portion to jump to without reading the inserted fields.
    Type: Application
    Filed: October 6, 2015
    Publication date: January 28, 2016
    Inventors: Lawrence Howard Rubin, Harish Kumar Shakamuri
  • Patent number: 9154586
    Abstract: Methods and systems are provided for enabling existing or legacy network devices to recognize and parse packets defined in accordance with future-defined standards, without having to be re-configured to be compatible with such standards. A transmitting network device may generate packets such that to enable receiving network devices to bypass, when processing the packets, unknown or newly-inserted fields, such as tag headers, in the packets, and to continue processing the remainder of the packet. This may be achieved by, for example, incorporating in the packets, when such unknown or newly-inserted are included in the packets, corresponding indication fields (e.g., tag header type fields) which may indicated that the unknown or newly-inserted are inserted. Further, indication fields may enable a receiving device to skip over these unknown or newly-inserted. For example, each tag header type filed may be associated with a particular tag header length of the corresponding tag header.
    Type: Grant
    Filed: September 17, 2014
    Date of Patent: October 6, 2015
    Assignee: EMULEX CORPORATION
    Inventors: Lawrence Howard Rubin, Harish Kumar Shakamuri
  • Publication number: 20150003461
    Abstract: Methods and systems are provided for enabling existing or legacy network devices to recognize and parse packets defined in accordance with future-defined standards, without having to be re-configured to be compatible with such standards. A transmitting network device may generate packets such that to enable receiving network devices to bypass, when processing the packets, unknown or newly-inserted fields, such as tag headers, in the packets, and to continue processing the remainder of the packet. This may be achieved by, for example, incorporating in the packets, when such unknown or newly-inserted are included in the packets, corresponding indication fields (e.g., tag header type fields) which may indicated that the unknown or newly-inserted are inserted. Further, indication fields may enable a receiving device to skip over these unknown or newly-inserted. For example, each tag header type filed may be associated with a particular tag header length of the corresponding tag header.
    Type: Application
    Filed: September 17, 2014
    Publication date: January 1, 2015
    Inventors: Lawrence Howard Rubin, Harish Kumar Shakamuri
  • Patent number: 8867568
    Abstract: Disclosed herein is a method allowing an existing or legacy network device to recognize and parse packets defined in accordance with future-defined standards without having to be re-configured to be compatible with such standards. In particular, the device can skip past unknown or newly-inserted fields, such as tag headers in a tagged packet, to parse and process the remainder of the packet. By skipping those added fields such as a tag header, the device can accommodate various future-defined standards without incurring additional engineering or design costs or compromising packet processing efficiency.
    Type: Grant
    Filed: October 28, 2011
    Date of Patent: October 21, 2014
    Assignee: Emulex Corporation
    Inventors: Lawrence Howard Rubin, Harish Kumar Shakamuri
  • Publication number: 20130107892
    Abstract: Disclosed herein is a method allowing an existing or legacy network device to recognize and parse packets defined in accordance with future-defined standards without having to be re-configured to be compatible with such standards. In particular, the device can skip past unknown or newly-inserted fields, such as tag headers in a tagged packet, to parse and process the remainder of the packet. By skipping those added fields such as a tag header, the device can accommodate various future-defined standards without incurring additional engineering or design costs or compromising packet processing efficiency.
    Type: Application
    Filed: October 28, 2011
    Publication date: May 2, 2013
    Applicant: Emulex Design & Manufacturing Corporation
    Inventors: Lawrence Howard Rubin, Harish Kumar Shakamuri