Patents by Inventor Harish Manohara

Harish Manohara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110174079
    Abstract: A miniature thermal conductivity gauge employs a carbon single-walled-nanotube. The gauge operates on the principle of thermal exchange between the voltage-biased nanotube and the surrounding gas at low levels of power and low temperatures to measure vacuum across a wide dynamic range. The gauge includes two terminals, a source of constant voltage to the terminals, a single-walled carbon nanotube between the terminals, a calibration of measured conductance of the nanotube to magnitudes of surrounding vacuum and a current meter in electrical communication with the source of constant voltage.
    Type: Application
    Filed: November 25, 2008
    Publication date: July 21, 2011
    Inventors: Harish Manohara, Anupama B. Kaul
  • Patent number: 7964433
    Abstract: Described is a device having an anti-reflection surface. The device comprises a silicon substrate with a plurality of silicon spikes formed on the substrate. A first metallic layer is formed on the silicon spikes to form the anti-reflection surface. The device further includes an aperture that extends through the substrate. A second metallic layer is formed on the substrate. The second metallic layer includes a hole that is aligned with the aperture. A spacer is attached with the silicon substrate to provide a gap between an attached sensor apparatus. Therefore, operating as a Micro-sun sensor, light entering the hole passes through the aperture to be sensed by the sensor apparatus. Additionally, light reflected by the sensor apparatus toward the first side of the silicon substrate is absorbed by the first metallic layer and silicon spikes and is thereby prevented from being reflected back toward the sensor apparatus.
    Type: Grant
    Filed: August 12, 2009
    Date of Patent: June 21, 2011
    Assignee: California Institute of Technology
    Inventors: Youngsam Bae, Harish Manohara, Sohrab Mobasser, Choonsup Lee
  • Publication number: 20110057164
    Abstract: A carbon nanotube field emission device with overhanging gate fabricated by a double silicon-on-insulator process. Other embodiments are described and claimed.
    Type: Application
    Filed: June 17, 2008
    Publication date: March 10, 2011
    Applicant: CALIFORNIA INSTITUTE OF TECHNOLOGY
    Inventors: Risaku Toda, Michael J. Bronikowski, Edward M. Luong, Harish Manohara
  • Patent number: 7899432
    Abstract: In an embodiment, a submillimeter wave heterodyne receiver includes a finline ortho-mode transducer comprising thin tapered metallic fins deposited on a thin dielectric substrate to separate a vertically polarized electromagnetic mode from a horizontally polarized electromagnetic mode. Other embodiments are described and claimed.
    Type: Grant
    Filed: February 15, 2008
    Date of Patent: March 1, 2011
    Assignee: California Institute of Technology
    Inventors: Goutam Chattopadhyay, Harish Manohara, Peter H. Siegel, John Ward
  • Publication number: 20100039342
    Abstract: In one embodiment, a slot array antenna comprising a quartz layer and a silicon layer, wherein the quartz and silicon layers are matched to suppress microwave modes, and a metal layer adjacent to the silicon layer comprising offset cuts.
    Type: Application
    Filed: May 19, 2009
    Publication date: February 18, 2010
    Applicant: California Institute of Technology
    Inventors: Mohammad M. Mojarradi, Goutam Chattopadhyay, Harish Manohara, Hadi Mojaradi
  • Publication number: 20100009495
    Abstract: Described is a device having an anti-reflection surface. The device comprises a silicon substrate with a plurality of silicon spikes formed on the substrate. A first metallic layer is formed on the silicon spikes to form the anti-reflection surface. The device further includes an aperture that extends through the substrate. A second metallic layer is formed on the substrate. The second metallic layer includes a hole that is aligned with the aperture. A spacer is attached with the silicon substrate to provide a gap between an attached sensor apparatus. Therefore, operating as a Micro-sun sensor, light entering the hole passes through the aperture to be sensed by the sensor apparatus. Additionally, light reflected by the sensor apparatus toward the first side of the silicon substrate is absorbed by the first metallic layer and silicon spikes and is thereby prevented from being reflected back toward the sensor apparatus.
    Type: Application
    Filed: August 12, 2009
    Publication date: January 14, 2010
    Applicant: California Institute of Technology
    Inventors: Youngsam Bae, Harish Manohara, Sohrab Mobasser, Choonsup Lee
  • Patent number: 7595477
    Abstract: Described is a device having an anti-reflection surface. The device comprises a silicon substrate with a plurality of silicon spikes formed on the substrate. A first metallic layer is formed on the silicon spikes to form the anti-reflection surface. The device further includes an aperture that extends through the substrate. A second metallic layer is formed on the substrate. The second metallic layer includes a hole that is aligned with the aperture. A spacer is attached with the silicon substrate to provide a gap between an attached sensor apparatus. Therefore, operating as a Micro-sun sensor, light entering the hole passes through the aperture to be sensed by the sensor apparatus. Additionally, light reflected by the sensor apparatus toward the first side of the silicon substrate is absorbed by the first metallic layer and silicon spikes and is thereby prevented from being reflected back toward the sensor apparatus.
    Type: Grant
    Filed: September 7, 2006
    Date of Patent: September 29, 2009
    Assignee: California Institute of Technology
    Inventors: Youngsman Bae, Sohrab Mooasser, Harish Manohara, Choonsup Lee, Kungsam Bae
  • Publication number: 20090108183
    Abstract: Described is a device having an anti-reflection surface. The device comprises a silicon substrate with a plurality of silicon spikes formed on the substrate. A first metallic layer is formed on the silicon spikes to form the anti-reflection surface. The device further includes an aperture that extends through the substrate. A second metallic layer is formed on the substrate. The second metallic layer includes a hole that is aligned with the aperture. A spacer is attached with the silicon substrate to provide a gap between an attached sensor apparatus. Therefore, operating as a Micro-sun sensor, light entering the hole passes through the aperture to be sensed by the sensor apparatus. Additionally, light reflected by the sensor apparatus toward the first side of the silicon substrate is absorbed by the first metallic layer and silicon spikes and is thereby prevented from being reflected back toward the sensor apparatus.
    Type: Application
    Filed: September 7, 2006
    Publication date: April 30, 2009
    Inventors: Youngsam Bae, Sohrab Mooasser, Harish Manohara, Choonsup Lee, Kungsam Bae
  • Publication number: 20080315181
    Abstract: Described is a Schottky diode using semi-conducting single-walled nanotubes (s-SWNTs) with titanium Schottky and platinum Ohmic contacts for high-frequency applications. The diodes are fabricated using angled evaporation of dissimilar metal contacts over an s-SWNT. The devices demonstrate rectifying behavior with large reverse-bias breakdown voltages of greater than ?15 V. In order to decrease the series resistance, multiple SWNTs are grown in parallel in a single device, and the metallic tubes are burnt-out selectively. At low biases, these diodes showed ideality factors in the range of 1.5 to 1.9. Modeling of these diodes as direct detectors at room temperature at 2.5 terahertz (THz) frequency indicates noise equivalent powers (NEP) comparable to that of the state-of-the-art gallium arsenide sold-state Schottky diodes, in the range of 10-13 W/square-root (?) Hz.
    Type: Application
    Filed: February 25, 2008
    Publication date: December 25, 2008
    Inventors: Harish Manohara, Brian Hunt, Erich Schlecht, Peter Siegel, Eric Wong
  • Publication number: 20080280583
    Abstract: In an embodiment, a submillimeter wave heterodyne receiver includes a finline ortho-mode transducer comprising thin tapered metallic fins deposited on a thin dielectric substrate to separate a vertically polarized electromagnetic mode from a horizontally polarized electromagnetic mode. Other embodiments are described and claimed.
    Type: Application
    Filed: February 15, 2008
    Publication date: November 13, 2008
    Applicant: California Institute of Technology
    Inventors: Goutam Chattopadhyay, Harish Manohara, Peter H. Siegel, John Ward
  • Publication number: 20060261433
    Abstract: Described is a Schottky diode using semi-conducting single-walled nanotubes (s-SWNTs) with titanium Schottky and platinum Ohmic contacts for high-frequency applications. The diodes are fabricated using angled evaporation of dissimilar metal contacts over an s-SWNT. The devices demonstrate rectifying behavior with large reverse-bias breakdown voltages of greater than ?15 V. In order to decrease the series resistance, multiple SWNTs are grown in parallel in a single device, and the metallic tubes are burnt-out selectively. At low biases, these diodes showed ideality factors in the range of 1.5 to 1.9. Modeling of these diodes as direct detectors at room temperature at 2.5 terahertz (THz) frequency indicates noise equivalent powers (NEP) comparable to that of the state-of-the-art gallium arsenide sold-state Schottky diodes, in the range of 10-13 W/square-root (?) Hz.
    Type: Application
    Filed: May 23, 2006
    Publication date: November 23, 2006
    Inventors: Harish Manohara, Brian Hunt, Erich Schlecht, Peter Siegel, Eric Wong
  • Publication number: 20060066202
    Abstract: High-current density field emission sources using arrays of nanofeatures bundles and methods of manufacturing such field emission sources are provided. Variable field emission performance is provided with the variance in the bundle diameter and the inter-bundle spacing, and optimal geometries for the lithographically patterned arrays were determined. Arrays of 1-?m and 2-?m diameter multi-walled carbon nanotube bundles spaced 5 ?m apart (edge-to-edge spacing) were identified as the most optimum combination, routinely producing 1.5 to 1.8 A/cm2 at low electric fields of approximately 4 V/?m, rising to >6 A/cm2 at 20 V/?m over a ˜100-?m-diameter area.
    Type: Application
    Filed: May 24, 2005
    Publication date: March 30, 2006
    Inventors: Harish Manohara, Michael Bronikowski
  • Patent number: 6692680
    Abstract: Methods of rapidly prototyping microstructures such as HARMs are disclosed. A high precision process uses polymeric microstructure replication techniques and sacrificial layer etching techniques to mass produce high aspect ratio metallic and polymer micromold inserts. In one embodiment, after fabrication of an initial micromold insert, high aspect ratio replications are created by casting replication material, such as PDMS, directly onto the initial micromold insert. The replicated HARM is coated with a sacrificial layer and then electroplated to replicate another set of micromold inserts. After the electroplating process is completed, the sacrificial layer is etched away to release the replicated micromold inserts.
    Type: Grant
    Filed: October 3, 2001
    Date of Patent: February 17, 2004
    Assignee: Board of Supervisors of Louisiana State University and Agricultural and Mechanical College
    Inventors: Jeong-Bong Lee, Harish Manohara, Kabseog Kim, Sang-Won Park
  • Publication number: 20030062652
    Abstract: Methods of rapidly prototyping microstructures such as HARMs are disclosed. A high precision process uses polymeric microstructure replication techniques and sacrificial layer etching techniques to mass produce high aspect ratio metallic and polymer micromold inserts. In one embodiment, after fabrication of an initial micromold insert, high aspect ratio replications are created by casting replication material, such as PDMS, directly onto the initial micromold insert. The replicated HARM is coated with a sacrificial layer and then electroplated to replicate another set of micromold inserts. After the electroplating process is completed, the sacrificial layer is etched away to release the replicated micromold inserts.
    Type: Application
    Filed: October 3, 2001
    Publication date: April 3, 2003
    Inventors: Jeong-Bong Lee, Harish Manohara, Kabseog Kim, Sang-Won Park