Patents by Inventor Harish Narandas Kotecha

Harish Narandas Kotecha has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4092548
    Abstract: A load device characteristic is improved for a static inverter by reducing the load device threshold voltage as the output voltage increases from its initial value. The circuit structure to accomplish this is an isolated substrate within which the FET load device is located, that substrate being connected to an inverter circuit for raising the voltage of the substrate as the source potential increases for the preferred depletion mode load device. The particular circuit is a two-stage inverter, the first stage being a modulating signal source, the output of the first stage inverter being connected to the isolated substrate of the FET load for a second inverter, so that the FET load device for the second stage inverter has its substrate modulated so that the magnitude of the substrate potential changes at a faster rate than does the source potential.
    Type: Grant
    Filed: March 15, 1977
    Date of Patent: May 30, 1978
    Assignee: International Business Machines Corporation
    Inventors: Kenneth Edward Beilstein, Jr., Harish Narandas Kotecha