Patents by Inventor Haritha Uppalapati

Haritha Uppalapati has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10379769
    Abstract: A method for managing a flash storage system includes measuring an operation time to complete a data operation on a flash memory block of a flash memory device of the flash storage system. The method includes updating, based on the measured operation time, a running average time for the flash memory device to complete the data operation. The method includes comparing the updated running average time to a threshold time. The method includes adjusting an operating parameter for the flash memory device to perform the data operation based on the comparison.
    Type: Grant
    Filed: December 30, 2016
    Date of Patent: August 13, 2019
    Assignee: Western Digital Technologies, Inc.
    Inventors: Dillip K. Dash, Aniryudh Reddy Durgam, Haritha Uppalapati
  • Publication number: 20180188991
    Abstract: A method for managing a flash storage system includes measuring an operation time to complete a data operation on a flash memory block of a flash memory device of the flash storage system. The method includes updating, based on the measured operation time, a running average time for the flash memory device to complete the data operation. The method includes comparing the updated running average time to a threshold time. The method includes adjusting an operating parameter for the flash memory device to perform the data operation based on the comparison.
    Type: Application
    Filed: December 30, 2016
    Publication date: July 5, 2018
    Inventors: Dillip K. DASH, Aniryudh Reddy DURGAM, Haritha UPPALAPATI
  • Patent number: 9535786
    Abstract: A storage device may include a controller and a plurality of memory devices logically divided into a plurality of pages. Each page in the plurality of pages may include a plurality of bits. The controller may be configured to: apply a read level to a control gate of a transistor for each respective bit in the plurality of bits; determine, based on an amount of current that flows through the transistor, a respective value for each bit from the respective plurality of bits; determine, based on the respective values for the respective plurality of bits, an error ratio that indicates a number of bits from the plurality of bits that are written as a first bit value but are incorrectly read as a second bit value relative to a number of bits from the plurality of bits that are written as the second bit value but are incorrectly read as the first bit value; and adjust, based on the error ratio, the read level.
    Type: Grant
    Filed: February 9, 2015
    Date of Patent: January 3, 2017
    Assignee: HGST Netherlands B.V.
    Inventors: Aniryudh Reddy Durgam, Haritha Uppalapati, Kiran Yalamanchi
  • Publication number: 20160232054
    Abstract: A storage device may include a controller and a plurality of memory devices logically divided into a plurality of pages. Each page in the plurality of pages may include a plurality of bits. The controller may be configured to: apply a read level to a control gate of a transistor for each respective bit in the plurality of bits; determine, based on an amount of current that flows through the transistor, a respective value for each bit from the respective plurality of bits; determine, based on the respective values for the respective plurality of bits, an error ratio that indicates a number of bits from the plurality of bits that are written as a first bit value but are incorrectly read as a second bit value relative to a number of bits from the plurality of bits that are written as the second bit value but are incorrectly read as the first bit value; and adjust, based on the error ratio, the read level.
    Type: Application
    Filed: February 9, 2015
    Publication date: August 11, 2016
    Inventors: Aniryudh Reddy Durgam, Haritha Uppalapati, Kiran Yalamanchi